Methods of forming conductive interconnects

Details Methods of forming conductive interconnects Methods of forming conductive interconnects

2003-01-30

2004-06-15

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S674000

Reexamination Certificate

active

06750089

ABSTRACT:

TECHNICAL FIELD
The invention pertains to methods of forming conductive interconnects.
BACKGROUND OF THE INVENTION
Conductive interconnects are frequently used for connecting portions of integrated circuitry. Conductive interconnects can extend either vertically or horizontally, depending on their particular application. For instance, vertically extending conductive interconnects (conductive plugs) can be utilized for connecting circuitry at one elevational level with an electrical node at a different elevational level. An exemplary prior art conductive plug is described with reference to a semiconductive wafer fragment
10
in FIG.
1
.
Wafer fragment
10
comprises a substrate
12
, and an insulative material
14
overlying substrate
12
. Substrate
12
can comprise, for example, monocrystalline silicon lightly doped with a p-type conductivity-enhancing dopant. To aid in interpretation of the claims that follow, the term “semiconductive substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above. Insulative material
14
can comprise, for example, borophosphosilicate glass (BPSG).
An electrical node
16
is supported by substrate
12
, with node
16
being at an electrical node location of substrate
12
. In the shown structure, electrical node
16
comprises a diffusion region formed within substrate
12
. Such diffusion region can be formed by implanting a conductivity-enhancing dopant within substrate
12
to a concentration which creates the electrically conductive region
16
.
An opening
20
extends through insulative layer
14
and to electrical node
16
. A silicide layer
22
is provided at a bottom of opening
20
and over electrical node
16
, a titanium nitride barrier layer
21
is formed over silicide layer
22
, and a conductive plug
24
is provided over silicide material
22
. Conductive plug
24
comprises a metal, such as, for example, tungsten, and can be formed by, for example, sputter deposition.
Silicide material
22
can be formed by depositing a silicide, such as, for example, titanium silicide, over electrical node
16
.
A conductive material
33
is provided over insulative material
14
and in contact with plug
24
. Plug
24
thus functions as a conductive interconnect between the elevationally upper circuitry of material
33
and the elevationally lower circuitry of node
16
. In the shown construction, plug
24
and insulative layer
14
comprise a common and planarized upper surface
30
. Such planarized upper surface can be formed by, for example, chemical-mechanical polishing.
As conductive interconnects are utilized in numerous circuitry constructions, it would be desirable to develop alternative methods of forming conductive interconnects.
SUMMARY OF THE INVENTION
In one aspect, the invention includes a method of forming a conductive interconnect. An electrical node location is defined to be supported by a silicon-containing substrate. A silicide is formed in contact with the electrical node location. The silicide is formed by exposing the substrate to hydrogen, TiCl
4
and plasma conditions to cause Ti from the TiCl
4
to combine with silicon of the substrate to form TiSi
x
. Conductively doped silicon material is formed over the silicide. The conductively doped silicon material is exposed to one or more temperatures of at least about 800° C. The silicide is also exposed to the temperatures of at least about 800° C.
In another aspect, the invention includes another method of forming a conductive interconnect. A silicon-comprising electrical node is supported by a substrate. An insulative material is formed over the substrate. The insulative material has an opening therein which extends to the electrical node. A silicide is formed within the opening and over the electrical node. The silicide is formed by exposing the electrical node to hydrogen, TiCl
4
and plasma conditions to cause Ti from the TiCl
4
to combine with silicon of the node to form TiSi
x
. A conductive barrier layer is formed over the silicide within the opening. A conductively doped silicon material is formed over the barrier layer within the opening. The barrier layer protects against migration of dopant from the conductively doped silicon material to the silicide.


REFERENCES:
patent: 6245674 (2001-06-01), Sandhu
patent: 2002/0019127 (2002-02-01), Givens

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