Integrated lithographic layout optimization

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

06832364

ABSTRACT:

The present invention relates to the manufacture of very large scale integrated (VLSI) circuits and, more particularly, to the enhancement of photolithographic images through the use of phase shifted masks.
BACKGROUND OF THE INVENTION
A very large scale integrated (VLSI) complementary metal oxide semiconductor (CMOS) chip is manufactured on a silicon wafer by a sequence of material additions (i.e., low pressure chemical vapor depositions, sputtering operations, etc.), material removals (i.e., wet etches, reactive ion etches, etc.), and material modifications (i.e., oxidations, ion implants, etc.). These physical and chemical operations interact with the entire wafer. For example, if a wafer is placed into an acid bath, the entire surface of the wafer will be etched away. In order to build very small electrically active devices on the wafer, the impact of these operations has to be confined to small, well defined regions.
Lithography in the context of VLSI manufacturing of CMOS devices is the process of patterning openings in photosensitive polymers (sometimes referred to as photoresists or resists) which define small areas in which the silicon base material is modified y a specific operation in a sequence of processing steps. The manufacturing of CMOS chips involves the repeated patterning of photoresist, followed by an etch, implant, deposition, or other operation, and ending with the removal of the expended photoresist to make way for the new resist to be applied for another iteration of this process sequence.
The basic lithography system consists of a light source, a stencil or photo mask containing the pattern to be transferred to the wafer, a collection of lenses, and a means for aligning existing patterns on the wafer with patterns on the mask. The aligning may take place in an aligning step or steps and may be carried out with an aligning apparatus. Since a wafer containing from 50 to 100 chips is patterned in steps of 1 to 4 chips at a time, these lithography tools are commonly referred to as steppers. The resolution, R, of an optical projection system such as a lithography stepper is limited by parameters described in Raleigh's equation:
R=k &lgr;/NA,
where &lgr; represents the wavelength of the light source used in the projection system and NA represents the numerical aperture of the projection optics used. “k” represents a factor describing how well a combined lithography system can utilize the theoretical resolution limit in practice and can range from about 0.8 down to about 0.5 for standard exposure systems. The highest resolution in optical lithography is currently achieved with deep ultra violet (DUV) steppers operating at 248 nm wavelengths of 356 nm are also in widespread use and 193 nm wavelength lithography is becoming commonplace.
Conventional photo masks consist of chromium patterns on a quartz plate, allowing light to pass wherever the chromium has been removed from the mask. Light of a specific wavelength is projected through the mask onto the photoresist coated wafer, exposing the resist wherever hole patterns are placed on the mask. Exposing the resist to light of the appropriate wavelength causes modifications in the molecular structure of the resist polymers which, in common applications, allow a developer to dissolve and remove the resist in the exposed areas. Such resist materials are known as positive resists. (Negative resist systems allow only unexposed resist to be developed away.) The photo masks, when illuminated, can be pictured as an array of individual, infinitely small light sources which can be either turned on (points in clear areas) or turned off (points covered by chrome). If the amplitude of the electric field vector which describes the light radiated by these individual light sources is mapped across a cross section of the mask, a step function will be plotted reflecting the two possible states that each point on the mask can be found (light on, light off).
These conventional photo masks are commonly referred to as chrome on glass (COG) binary masks, due to the binary nature of the image amplitude. The perfectly square step function of the light amplitude exists only in the theoretical limit of the exact mask plane. At any given distance away from the mask, such as in the wafer plane, diffraction effects will cause images to exhibit a finite image slope. At small dimensions, that is, when the size and spacing of the images to be printed are small relative to the &lgr;/NA, electric field vectors of adjacent images will interact and add constructively. The resulting light intensity curve between the image features is not completely dark, but exhibits significant amounts of light intensity created by the interaction of adjacent features. The resolution of an exposure system is limited by the contrast of the projected image, that is, the intensity difference between adjacent light and dark image features. An increase in the light intensity in nominally dark regions will eventually cause adjacent features to print as one combined structure rather than discrete images.
As VLSI lithography is being challenged to deliver manufacturable patterning solutions at unprecedented resolution levels, strong resolution enhancement techniques (RET) are becoming increasingly popular. Techniques such as sub-resolution-assist-features (SRAF) combined with off-axis-illumination (OAI) and attenuated phase shifted mask (PSM), alternating phase shifted mask (altPSM), or dipole feature decomposition offer the possibility of doubling the resolution of conventional lithography (see Liebmann et al., “TCAD Development for Lithography Resolution Enhancement,” IBM J. Res. & Dev., Vol. 45, no. 5 (September 2001), pp. 651-665). This increased resolution is bought at the cost of complex layout manipulations (for example, see Liebmann et al., “Optimizing Style Options for Sub-Resolution Assist Features,” in Optical Microlithography XIV (C. Progler, ed.), Proceedings of SPIE, Vol. 4346 (2001), pp. 141-152). Post tape-out or post-layout implementation of strong RET (i.e., implementation of RET after physical design and verification), is limited in scope and effectiveness. To realize the full potential of strong RET, layout optimization has to occur at the physical design level. AltPSM was the first RET to clearly demonstrate the need for deep integration into the design flow (see Liebmann et al., “Enabling Alternating Phase Shifted Mask Designs for a Full Logic Gate Level: Design Rules and Design Rule Checking,” in Design Automation Conference 2001 (Jun. 18-22, 2001), pp.79-84) and will be used here to exemplify the concept of integrated RET layout optimization.
The quality with which small images can be replicated in lithography depends largely on the available process window; that is, that amount of allowable dose and focus variation that still results in correct image size. Phase shifted mask (PSM) lithography improves the lithographic process window or allows operation at a lower k value by introducing a third parameter on the mask. The electric field vector, like any vector quantity, has a magnitude and direction, so, in addition to turning the electric field amplitude on and off, it can be turned on with a phase of about 0° or turned on with a phase of about 180°. This phase variation is achieved in PSMs by modifying the length that a light beam travels through the mask material. By recessing the mask to an appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the masks will be 180° out of phase, that is, their electric field vector will be of equal magnitude but point in exactly the opposite direction so that any interaction between these light beams result in perfect cancellation. However, because the 180° phase transition forces a minimum in the image intensity, narrow dark lines will be printed. These unwanted residual phase images are erased using a trim mask, which is a second mask that transmits light only in regions left unexposed by the residual phase edge.
Alternating Phase Shifted M

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