Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-01-08
2004-11-23
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S310000, C257S347000, C257S382000, C257S383000, C257S411000, C257S412000, C257S413000, C257S040000, C349S138000
Reexamination Certificate
active
06822293
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a structure of a semiconductor device equipped with semiconductor circuits composed of semiconductor elements such as insulated gate transistors, and also to a process for producing the same. More particularly, the present invention relates to a semiconductor device equipped with semiconductor circuits composed of semiconductor elements having wiring of tantalum material and also to a process for producing the same. The semiconductor device of the present invention includes not only such elements as thin film transistors (TFT) and MOS transistors but also display units having semiconductor circuits composed of said insulated gate transistors and electro-optical units such as image sensors. Moreover, the semiconductor device of the present invention also includes electronic machines and equipment equipped with such display units and electro-optical units.
2. Description of the Related Art
Much attention is being devoted to active matrix liquid crystal displays in which the pixel matrix circuits and drive circuits are constructed of thin film transistors (TFT) formed on an insulating substrate. Liquid crystal displays in use have a size ranging from 0.5 to 20 inches.
One of the developmental works for liquid crystal displays is directed to increasing their display area. Unfortunately, according as the display area increases, the pixel matrix circuits for pixel displays also increase in area. As the result, the source wiring and gate wiring arranged in matrix become longer, resulting in an increased wiring resistance. Moreover, in order to meet the requirement for finer pitches, it is necessary to make wiring smaller. This causes the wiring resistance to increase remarkably. Since TFTs are connected to the source wiring and gate wiring for individual pixels, an increased number of pixels leads to an increased parasitic capacity. Liquid crystal displays are usually have the gate wiring and gate electrode formed integrally, and hence the gate signal delay becomes significant according as the panel area increases.
Therefore, if the gate electrode wiring is made of a material having a lower resistivity, then it would be possible to make the gate wiring thinner and longer accordingly. This leads to panels of large area. Conventional materials for gate electrode wiring are Al, Ta, and Ti. Of these, aluminum is most common because of its low resistivity and capability of anodic oxidation. Aluminum forms anodic oxidized film which contributes to heat resistance but suffers whiskers and hillocks, wiring deformation, and diffusion into the insulating film and active layer even at low process temperatures of 300-400° C. This is the major cause to deteriorate TFT's action and characteristic properties.
What is necessary for larger panels and finer pixels is an electrode structure which has a lower resistivity and better heat resistance.
Properties currently required of TFT are high mobility. It is expected that this requirement would be met if crystalline semiconductor film, which has higher mobility than amorphous semiconductor film, is used as the active layer. In the past, it was necessary to use a quartz substrate having a high strain point in order to obtain a crystalline semiconductor film by heat treatment. Attempts have been made to reduce the crystallization temperature so that expensive quartz substrates are replaced by cheap glass substrates.
Accordingly, the present inventors developed a technology to produce a crystallized semiconductor film from an amorphous semiconductor film (typically that of amorphous silicon film or Ge-containing amorphous silicon film) by introduction of a small amount of metal element and subsequent heat treatment. (Japanese Patent Laid-open No. 6-232059 and 7-321339) Examples of the metal element to promote crystallization include Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au. They may be used alone or in combination with another. This technology enables the production of crystalline semiconductor film at a process temperature low enough for the glass substrate to withstand. Other metals that can be used include Ge and Pb, which undergo substitutional diffusion into amorphous semiconductor film.
The disadvantage of this technology is that the metal used for crystallization remains in the crystalline semiconductor film, producing an adverse effect on TFT's characteristic properties (particularly, reliability and uniformity). So, the present inventors further developed a technology to form wiring from aluminum and subsequently remove the metal elements from the crystalline semiconductor film by gettering. (Japanese Patent Laid-open No.8-330602) According to this technology, gettering is accomplished by performing heat treatment while using the phosphorus-doped source region and drain region as the gettering sink so that the catalyst elements in the channel forming region are captured in the source region and drain region.
However, the above-mentioned technology has the disadvantage of being limited in the temperature range for heat treatment (about 300-450° C.) because wiring is made of aluminum with low heat resistance. For satisfactory gettering, heat treatment at 400° C. and above, preferably 550° C. and above, is necessary.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device with a new electrode structure which has a low resistivity and withstands gettering satisfactorily. It is another object of the present invention to provide a process for producing said semiconductor device.
The first aspect of the present invention is a semiconductor device equipped with semiconductor circuits composed of semiconductor elements, wherein said semiconductor element comprises:
a substrate with an insulating surface,
a gate electrode of multi-layer structure over said substrate,
a protective film covering said substrate and the top and sides of said gate electrode,
a gate insulating film covering said protective film, and
a source region, a drain region, and a channel forming region (between said source region and said drain region) which are formed on said gate insulating film.
In the above-mentioned construction, the gate electrode of multi-layer structure has at least one layer whose principal component is at least one kind of element selected from tantalum, molybdenum, titanium, chromium, and silicon.
In the above-mentioned construction, the gate electrode of multi-layer structure is composed of three layers arranged on top of another, with a first layer being composed mainly of tantalum and containing nitrogen, a second layer being composed mainly of tantalum, and a third layer being composed mainly of tantalum and containing nitrogen, the first layer being adjacent to the substrate.
The second aspect of the present invention is a semiconductor device equipped with semiconductor circuits composed of semiconductor elements, wherein said semiconductor element comprises:
a substrate with an insulating surface,
a gate electrode over said substrate,
a protective film covering said substrate and the top and sides of said gate electrode,
a gate insulating film covering said protective film,
a source region, a drain region, and a channel forming region (between said source region and said drain region) which are formed on said gate insulating film,
an inorganic insulator in contact with said channel forming region, and
an organic resin film in contact with said source region and drain region.
In the above-mentioned second construction, the gate electrode is of three-layer structure, with a first layer being composed mainly of tantalum and containing nitrogen, a second layer being composed mainly of tantalum, and a third layer being composed mainly of tantalum and containing nitrogen.
In each of the above-mentioned constructions, the protective film is a silicon nitride film and has a film thickness of 10-100 nm.
In each of the above-mentioned constructions, the source region and drain region are at least partly silicide.
In e
Fujimoto Etsuko
Fukuchi Kunihiko
Isobe Atsuo
Takayama Toru
Yamazaki Shunpei
Ortiz Edgardo
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
Wilson Allan R.
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