Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2004-06-30
2004-12-28
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S466000
Reexamination Certificate
active
06835620
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to a method of manufacturing semiconductor devices, and more specifically, to a method of manufacturing flash memory devices.
2. Discussion of Related Art
A method of forming a gate electrode in a flash memory device is classified into a method of forming a floating gate electrode and a method of forming a control gate electrode. In order to satisfy the coupling ratio of the floating gate electrode, the surface area of a first polysilicon film becoming the floating gate electrode has to be increased. At this time, the method of increasing the surface area of the first polysilicon film includes a method of increasing a width of the first polysilicon film and a method of increasing a thickness of the first polysilicon film. Conventionally, the method of increasing the width of the first polysilicon film (“a” in
FIG. 1
) is usually used.
If the width of the first polysilicon film increases, however, a space between an active region and an active region must be increased. Therefore, there is a problem that the width of an isolation film formed in an inactive region increases to increase the cell size.
In this connection, there is a need for technology for forming a first polysilicon film for use in a floating gate electrode capable of reducing the cell size while satisfying the coupling ratio of the floating gate electrode.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been made in view of the above problems, and it is an object of the present invention to provide a method of manufacturing flash memory devices wherein a first polysilicon film for use in a floating gate electrode, which can reduce the cell size while satisfying the coupling ratio of the floating gate electrode, is formed.
In order to accomplish the above object, according to a preferred embodiment of the present invention, there is provided a method of manufacturing flash memory devices, comprising the steps of: sequentially forming a gate oxide film, a first polysilicon film for a floating gate electrode and a pad nitride film on a semiconductor substrate; patterning the gate oxide film, the first polysilicon film, the pad nitride film and the semiconductor substrate by a given thickness to form an isolation film pattern and a floating gate electrode pattern at the same time; filling the isolation film pattern with an insulating film to form an isolation film and then stripping the pad nitride film; sequentially forming a dielectric film, a second polysilicon film for a control gate electrode and a metal silicide film on the results; patterning the metal silicide film and the second polysilicon film to form a control gate electrode pattern; performing an electrochemical process for the results, whereby the first polysilicon film formed in regions other than the region where the second polysilicon film formed on the isolation film and the floating gate electrode pattern are formed becomes a porous silicon film; performing a thermal oxidization process for the results so that the porous silicon film becomes a first oxide film; and forming a second oxide film on the whole results.
It is preferred that the first polysilicon film in which the porous silicon film is formed is a film formed between the floating gate electrode patterns.
It is preferable that the second oxide film is a film for insulation between the control gate electrode patterns.
The electrochemical process is preferably performed in a state where the semiconductor substrate formed up to the control gate electrode is mounted in a working cell.
It is preferred that the working cell comprises a reference electrode and a relative electrode that are spaced from the semiconductor substrate by a given distance, ultraviolet rays illuminated on the semiconductor substrate, and an electrolyte solution that is filled into the working cell so that given regions of the reference electrode and the relative electrode are immersed.
The thermal oxidization process preferably includes performing a wet oxidization process under H
2
and O
2
gas atmosphere in a temperature range of about 700 to 900° C.
It is preferable that the first polysilicon film is formed in thickness of about 1350 Å.
REFERENCES:
patent: 5599727 (1997-02-01), Hakozaki et al.
patent: 2002/0168820 (2002-11-01), Kozicki et al.
Booth Richard A.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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