Method to selectively increase the top resistance of the...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S095000, C438S102000, C438S675000

Reexamination Certificate

active

06696355

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a phase-change memory device. More particularly, the present invention relates to a heater electrode in a chalcogenide memory cell. In particular, the present invention relates to a lower electrode with increased resistivity.
2. Description of Related Art
As microelectronic technology progresses, the need has arisen for new data retention schemes. One such data retention scheme is the chalcogenide phase-change technology. Typically, a phase-change memory device includes a polysilicon lower electrode, also known as a “matchstick”.
After the formation of a recess in a substrate that exposes an active area, a conformal introduction of lower electrode material is required. Lower electrode material is typically polycrystalline silicon. The conformal introduction of lower electrode material that is polycrystalline silicon may follow conventional introduction techniques known to those skilled in the art including chemical vapor deposition (CVD) techniques. Thereafter, a dopant is introduced into the polycrystalline silicon to adjust the resistivity, in one aspect, to lower the resistivity of the material. A suitable dopant is a P-typed dopant such as boron introduced. From the combination of polysilicon and dopant, a silicidation process is required to form a silicide of the lower electrode. This process typically is a doping, a first anneal, a wet strip, and a second anneal.
After proper doping and fill into the trench, a planarization process is required to remove any horizontal component of the lower electrode. Thereafter, a modifier material must be introduced into a portion of the lower electrode material to combine and/or react with the lower electrode material near the top to form a different material. The modifier is introduced to raise the local resistance of the lower electrode material. By modifying a portion of the lower electrode material, the resistivity at that modified portion may be changed. Because the modifying material is of a higher resistivity, the lower electrode may not provide sufficiently suitable ohmic contact between the lower electrode and the volume of memory material for a desired application. In such cases, modifying material may be introduced into the lower electrode at a depth below the exposed surface of the lower electrode. For example, a lower electrode of polycrystalline silicon may have polycrystalline silicon at the exposed surface and a modifying material at a depth below the exposed surface. Additionally, barrier materials must be added to prevent cross-contamination between the chalcogenide material and the lower electrode. Typically, the formation of a barrier requires a nitridation process.
As low power set and reset processes are preferred, it is desirable to reduce the energy requirement for the lower electrode to program the phase-change memory device.


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patent: 2002/0017701 (2002-02-01), Klersy et al.
patent: 2002/0045323 (2002-04-01), Lowry et al.

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