Single chip pad oxide layer growth process

Details Single chip pad oxide layer growth process Single chip pad oxide layer growth process

2002-06-14

2004-03-02

Le, Dung A (Department: 2818)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S770000, C438S773000, C438S775000, C438S777000, C118S72300R

Reexamination Certificate

active

06699796

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The invention relates to a semiconductor process and, in particular, to a single chip pad oxide layer process.
2. Related Art
After exposing a silicon chip in a high-temperature and oxygen environment for a period, we can grow a layer of insulator SiO
2
with good adhesive and satisfactory electricity properties on the surface of the silicon chip. SiO
2
has a wide application in silicon dominated semiconductor elements. Aside from manufacturing by thermally oxidizing silicon chips, we can also achieve the same effect by the CVD (Chemical Vapor Deposition) technology. Such methods include low pressure CVD and plasma CVD.
Which method is used to prepare the SiO
2
layer has a great influence on the manufacturing process of the elements. Basically, the SiO
2
grown using the thermal oxidation method has the best electricity and material properties among the above-mentioned three methods. However, the temperature needed in this method is usually the highest.
During the earlier semiconductor process, the high-temperature environment does not affect the preparation of elements. Therefore, we often use the simple thermal oxidation method to grow on the silicon chip surface SiO
2
, such as a pad oxide layer, that is needed for later processes.
Most of the pad oxide layer process is performed using furnaces because it is a high-temperature process and the high-temperature process is often done in furnaces. It is worth mentioning that other heating technologies are neither mature nor stable as the furnace. This is one of the major reasons why the furnace is used. Explicitly speaking, if the temperature cannot be accurately controlled when it is increased from the room temperature to an extremely high temperature (e.g. 800° C.~900° C.), the silicon chip thus prepared may be different in the thickness of the thermal oxide layer. The homogeneity in thickness will be unsatisfactory.
The furnace usually increases the temperature by two to three degrees every minute. Although the furnace process normally prepares one to two hundred silicon chips at a time, it takes quite a long time (about five to six hours).
SUMMARY OF THE INVENTION
One objective of the invention is to shorten the reaction time in the pad oxide layer process.
Another objective of the invention is to increase the homogeneity of the pad oxide layer thickness.
To achieve the above-mentioned and other objectives, the invention provides a single chip pad oxide layer growth process. First, a silicon chip is sent into a reaction chamber, which is filled with hydrogen and oxygen. A rapid thermal process is employed to increase the temperature inside the chamber to about 850° C. to 1100° C. to grow a pad oxide layer. The error on the final temperature after the rapid thermal process can be controlled to fluctuate within one to two degrees.
According to a preferred embodiment of the invention, the ratio of hydrogen to the sum of hydrogen and oxygen is about 5% to 15%. In addition, the pressure inside the reaction chamber can be 5 Torrs to 15 Torrs. The thickness of the a pad oxide layer is about 40 Å to 200 Å.
From one point of view, the invention provides an early semiconductor process which does not use a furnace. First, a silicon chip is sent into a reaction chamber, which is filled with hydrogen and oxygen. A rapid thermal process is employed to increase the temperature inside the chamber to about 850° C. to 1100° C. to grow a pad oxide layer. In comparison with the prior art, the disclosed process has a shorter reaction time and the pad oxide layer thus prepared has better homogeneity in thickness.
From another point of view, the invention provides an early process for semiconductor manufacturing. First, four silicon chips are sent into four reaction chambers that are filled with hydrogen and oxygen. A rapid thermal process is employed to increase the temperature inside the chamber to about 850° C. to 1100° C. to grow a pad oxide layer. The error on the final temperature after the rapid thermal process can be controlled to fluctuate within one to two degrees.
According to a preferred embodiment of the invention, the ratio of hydrogen to the sum of hydrogen and oxygen is about 5% to 15%. In addition, the pressure inside the reaction chamber can be 5 Torrs to 15 Torrs. The thickness of the a pad oxide layer is about 40 Å to 200 Å.
Since it only takes about two to three minutes of reaction time for each chip and four chips can be prepared at a time, the invention only needs a shorter processing time and the SiO
2
layer thus fabricated has better homogeneity in thickness.


REFERENCES:
patent: 6410456 (2002-06-01), Gronet et al.
patent: 6450116 (2002-09-01), Noble et al.

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