Method for forming multi-layer wiring structure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S782000

Reexamination Certificate

active

06723633

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a multi-layer wiring structure on a semiconductor wafer or on a glass substrate.
2. Description of Related Art
In general, a device being formed on a semiconductor wafer or on a glass substrate has a multi-layer wiring structure comprising a lower wiring layer and an upper wiring layer which are electrically connected through a so-called via hole.
However, in such a multi-layer wiring structure, when only an insulating film is provided between the upper wiring layer and the lower wiring layer, an unevenness of the lower wiring layer will be present on the surface of the insulating film, and breakage will be caused in the upper wiring layer which is formed on the uneven surface by a CVD method. Therefore, technologies for flattening are normally applied, in which recesses are filled up with SOG (Spin-On-Glass: silicon oxide film which is formed by coating and baking solution of silicon compound). Among those, regarding an inorganic SOG including Si—H chemical bonds, it is disclosed in, for example, Japanese Patent Application No. Hei 8-316,228 (1996).
The SOG, which is disclosed in Japanese Patent Application Publication No. Hei 8-316,228 (1996) is an inorganic SOG including Si—H chemical bonds. Therefore, it has a high dielectric constant in comparison with that of an organic SOG, and easily cracks due to heat.
On the other hand, an organic SOG does not have the same problems that an inorganic SOG has. However, it is easy to cause a defect which is called as a “poisoned via” when a resist film is treated by a so-called ashing process by using oxygen gas. Particularly, in an organic SOG, an organic group (for example, a methyl group (CH
3
)) is bonded to Si, and the atomic radius of the methyl group is larger than that of a hydrogen group of an inorganic SOG which causes a serious problem.
This problem will be explained by referring to
FIG. 5
showing a method for forming a multi-layer wiring structure of the conventional art. First of all, as shown in FIG.
5
(
a
), after a lower wiring layer
101
is formed or a substrate W, a hillock protection film
102
is formed by a CVD method. As shown in FIG.
5
(
b
), a SOG film
103
is formed on the hillock protection film
102
, and thereafter, as shown in FIG.
5
(
c
), an upper wiring layer
104
is formed on the SOG film
103
further, a patterned resist layer
105
is provided as shown in FIG.
5
(
d
), and as shown is FIG. (e), a via hole (or a through hole)
106
is formed by using the patterned resist layer
105
as a mask through an etching process on the hillock protection film
102
, the SOG film
103
and the upper wiring layer
104
. Next, as shown in FIG.
5
(
f
), the patterned resist layer
105
is removed by an ashing process. Furthermore, as shown in FIG.
5
(
g
), conductive material
107
such as aluminum is filled within the via hole
106
, thereby electrically connecting between the wiring layers and constructing a multi-layer wiring structure.
In this method, in a case where an organic SOG is used, the organic components thereof are decomposed when the resist layer is treated by an ashing process as shown in FIG.
5
(
f
), and a product such as water is stored within the films, thereby causing a defect
108
which is called as a “poisoned via”.
Therefore, such a method as shown in
FIG. 6
, in which an organic SOG is used and an etching back process is required, has been employed. Specifically, as shown in FIG.
6
(
a
), after a lower wiring layer
101
is formed on a substrate W, a hillock protection film
102
is formed by a CVD method, and a SOG film
103
is formed thereon. Next, as shown in FIG.
6
(
b
), an etching back process is used for removing the organic SOG film
103
with an oxygen plasma etc. by such a predetermined thickness that the organic SOG film
103
is removed to just above the lower wiring layer
101
. Thereafter, as shown in FIG.
6
(
c
), an upper wiring layer
104
is formed, and as shown in FIG.
6
(
d
), a patterned resist layer
105
is formed over the upper wiring layer
104
. As shown in FIG.
6
(
e
), by conducting an etching process and a subsequent ashing process, a via hole
106
is formed in the hillock protection film
102
and the upper wiring layer
104
, and the resist layer is removed. Further, as shown in FIG.
6
(
f
), conductive material
107
such as aluminum is filled within the via hole
106
, thereby electrically connecting between the wiring layers and constructing a multi-layer wiring structure.
By using such an etching back process as shown in
FIG. 6
, the via hole is formed in an area where the organic SOG film
103
does not exist, therefore, a “poisoned via” will not be generated.
However, in recent years, a further demand for miniaturization (for instance, less than or equal to 0.3 &mgr;m) has been required. If the wiring pattern is miniaturized, the thickness of the organic SOG becomes thick in an area where the wiring pattern is dense, while it becomes thin in an area where the wiring pattern is less dense.
If the organic SOG film under such conditions is etched back, the wiring layer is undesirably removed in an area where the wiring pattern is less dense.
SUMMARY OF THE INVENTION
For solving such disadvantages, in accordance with the present invention, there is provided a method for forming a multi-layer wiring structure, wherein a lower wiring layer and an upper wiring layer are electrically connected through a via hole, comprising the steps of: forming an organic SOG layer directly on said lower wiring layer or on a predetermined film including a hillock protection layer which is formed on said lower wiring layer in advance; forming said upper wiring layer on said organic SOG layer without using an etching back process; forming a via hole through an etching process by using a patterned resist layer provided on said upper wiring layer as a mask; performing an ashing process with a plasma by making ions or radicals which are induced from oxygen gas as a main reactant, under an atmosphere of pressure ranging from 0.01 Torr to 30.0 Torr; and filling said via hole with conductive material so as to electrically connect said lower wiring layer to said upper wiring layer.
By performing an ashing process with a plasma by making ions or radicals which are induced from oxygen gas as a main reactant under a low pressure ranging from 0.01 to 30.0 Torr, preferably, ranging from 0.01 to 1.2 Torr, it is possible to suppress decomposition of an organic group (for example, a CH
3
group etc.) which is bonded to an Si atom of the organic SOG film, and thereby prevent a “poisoned via” and so on from being generated during the ashing process. Consequently, according to the present invention, an etching back process is not necessary.
The carbon content of said organic SOG layer is in the range of 5 to 25 atomic weight %, more preferably, between 8 to 20 atomic weight %. The carbon content is used to determine a ratio of an organic group in an organic SOG, in other words, it can be theoretically calculated from a reaction amount of an alkoxysilane compound for preparing a coating liquid of forming an organic SOG, and it is a ratio of the atomic weight of carbon with respect to the total atomic weight of all elements.
If the carbon content is less than the range mentioned above, the organic component is too small to thicken the film, thus, cracks will easily occur, and an inherent advantage of an organic SOG i.e., a low dielectric constant is lost. On the other hand, if the carbon content is too great, a lack of adhesion occurs between an insulating layer which is provided on an upper layer.
For obtaining a film having the carbon content mentioned above, it is preferable to use, for example, a coating liquid containing a compound, which is obtained through hydrolysis and condensation of at least one being selected from alkoxysilane compounds in an organic solvent under existence of an acid catalyst, said alkoxysilane compound being expressed by a general equation,

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