Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2001-09-25
2004-05-18
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S778000, C438S780000, C438S781000, C438S782000, C438S787000, C438S790000
Reexamination Certificate
active
06737363
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-295237, filed Sep. 27, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to method of manufacturing a semiconductor device including a low dielectric constant insulating film.
2. Description of the Related Art
As miniaturization and operation speed of a semiconductor device progress, a wiring structure is shifting from monolayer to multilayer. At present, the semiconductor device having more than five metal wiring layers have been developed and manufactured. However, as miniaturization, operation speed, and multilayer progress, a problem of signal transmission delay attributable to the parasitic capacity between wires (so-called inter-wire parasitic capacity) and the wiring resistance of the device has become serious. The signal transmission delay is generally expressed as a product of the inter-wire parasitic capacity and the wiring resistance (CR time constant).
Various measures have been proposed to avoid the problem of signal transmission delay. For instance, in order to reduce the wiring resistance, it is proposed to use a Cu wire which has lower resistance than a popular Al wire. Conventionally, metal wire is formed by a dry etching process of a Cu film. However, the dry etching process of the Cu film is extremely difficult at present. Therefore, a damascene process is used for forming Cu wire at present.
On the other hand, in an attempt to reduce the inter-wire parasitic capacity, studies are being made of using low dielectric constant interlayer films such as SiOF films formed by CVD, so-called SOG (spin on glass) films formed by spin coating and organic resin (polymeric) films in place of currently popular silicon oxide (SiO
2
) films formed by CVD.
Generally, it is believed that the relative dielectric constant of SiOF film can be reduced to about 3.3. However, from the viewpoint of the stability of performance, it will not be feasible to use the SiOF film showing a relative dielectric constant lower than above mentioned value SiO
2
film that has been popular shows a relative dielectric constant of 3.9.
To the contrary, it may highly probably possible to reduce the relative dielectric constant of low dielectric constant insulating film obtained by means of coating method to about 2.0 so that massive efforts are being made in this research area. Generally, the low dielectric constant insulating film is formed by means of coating method including three steps of:
(1) coating a surface of a semiconductor substrate with a thin film forming material uniformly by dropping the thin film forming material, and rotating the semiconductor substrate;
(2) placing the semiconductor substrate on a hot plate and heating the semiconductor substrate stepwise (e. g., at 100° C. for 1 minute and then at 200° C. for another 1 minute); and
(3) baking the thin film forming material in an electric furnace (e. g., at 420° C. for 60 minutes).
Since the low dielectric constant insulating film has a low film density, its mechanical strength is lower than that of conventional SiO
2
film. Then, since the low dielectric constant insulating film has a low mechanical strength, its crack resistance is low. Thus, generally, the low dielectric constant insulating film having a siloxane (Si—O) bond as main skeleton becomes unable to withstand its own stress when the film thickness goes above 1 &mgr;m. Then, cracks can appear in the low dielectric constant insulating film.
It is known that the formation of cracks is accelerated by moisture. However, it is highly difficult to control the environment of forming low dielectric constant films so as to reduce the moisture without significantly raising the manufacturing cost.
BRIEF SUMMARY OF THE INVENTION
A method of manufacturing a semiconductor device according to an aspect of the present invention comprises:
forming a low dielectric constant insulating film having a siloxane bond as main skeleton on a semi-conductor substrate;
causing a surfactant to permeate the low dielectric constant insulating film; and
conducting a predetermined step on the low dielectric constant insulating film permeated with the surfactant in a state adapted to be exposed to water.
A method of manufacturing a semiconductor device according to another aspect of the present invention comprises:
forming a low dielectric constant insulating film having a siloxane bond as main skeleton on a semiconductor structure including a substrate;
forming a film to be polished on the low dielectric constant insulating film; and
polishing the film to be polished by a CMP process, to expose a part of the surface of the low dielectric constant insulating film and impregnate the low dielectric constant insulating film with a surfactant by way of the exposed surface.
A method of manufacturing a semiconductor device according to another aspect of the present invention comprises:
forming a low dielectric constant insulating film having a siloxane bond as main skeleton on a semiconductor structure including a substrate, the low dielectric constant insulating film being provided with a wiring groove in a surface thereof;
forming a conductive film on the low dielectric constant insulating film; and
polishing the conductive film by using a CMP slurry including a surfactant to leave the conductive film in the wiring groove selectively and to expose a part of a surface of the low dielectric constant insulating film by removing the conductive film out of the wiring groove, the low dielectric constant insulating film being impregnated with the surfactant by way of an exposed surface thereof during a CMP process.
REFERENCES:
patent: 6046112 (2000-04-01), Wang
patent: 6420469 (2002-07-01), Suda
patent: WO9729510 (1997-08-01), None
patent: WO 00-39028 (2000-07-01), None
Wiederhorn, S.M., “Influence of Water Vapor on Crack Propagation in Soda-Lim e Glass”, Journal of the American Ceramic Society, vol.50, No. 8, pp. 407-414, Aug. 1967.
Chinese Patent Office Action dated Nov. 14, 2003, and English translation thereof.
Hayasaka Nobuo
Kurashima Nobuyuki
Miyajima Hideshi
Yamada Nobuhide
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Keshavan Belur V
Smith Matthew
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