Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2000-05-05
2004-01-20
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S763010, C326S016000
Reexamination Certificate
active
06681361
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a testing equipment of the semiconductor device and a method for testing a semiconductor device, and more particularly to an equipment that performs prescribed inspection and measurement of a plurality of semiconductor devices under test (DUTs) in the measurement part of a device handler and that sorts the semiconductor devices by quality, and to a method for performing such a semiconductor device inspection and sorting.
2. Description of Related Arts
In the past, the testing equipment of the semiconductor device which performed an inspection on a plurality of semiconductor devices simultaneously and classified the devices under test into categories according to the grade, having a function of moving a tray within a device handler and measurement section that inspects a prescribed characteristic value was know, for example from the disclosure in Japanese Unexamined Patent Publication (KOKAI) No. 8-262102.
In the prior art, however, collection of data from each measurement section of the testing equipment for a reference sample (known as correlation) was performed at startup, at periodic inspections, and when an abnormality occurred.
In the above cases, because data collection was not possible without human intervention, the required labor, setup, calculation of compensation values, and program modifications required time and labor, so that the correlation process placed a burden on technical personnel.
In particular, because inspection capability and inspection accuracy with respect to prescribed characteristics of each DUTs provided within the measurement section exhibit variations, unless correlation is done carefully, classification and categorization of the semiconductor devices based on the measurement results will often include error and be lacking in accuracy.
In the above-noted Japanese Unexamined Patent Publication (KOKAI) No. 8-262102, there is in particular a disclosure of technology whereby a device that is judged bad at the first measurement is measured once again. However, there is no disclosure with regard to an automatic method for performing correlation considering the variation of measurement accuracies between individual DUTs of a plurality of DUTs.
In Japanese Unexamined Patent Publication (KOKAI) No. 63-64335, there is a configuration whereby image processing technology is used to perform efficient positioning of an IC package that is fed at the handler with a test connector. However, there is therein no disclosure of technology for improvement with regard to the variation in the measurement accuracy at the DUT section.
In Japanese Unexamined Patent Publication (KOKAI) No.s 8-147369 and 5-11020, there is language with regard to a semiconductor device inspection method whereby measurement values for a given lot are stored beforehand, and wherein a reference value for measurement values with respect to the semiconductor devices of the same lot are statistically determined based on this stored measurement information, a comparison being made between the reference values and measured values. There is therein, however, no disclosure of technology for improving variation in measurement accuracy for individual DUTs.
Additionally, in Japanese Unexamined Patent Publication (KOKAI) No. 8-184643, similar to the case of the Japanese Unexamined Patent Publication (KOKAI) No. 8-262102, there is disclosure of technology for remeasuring a semiconductor device that has been judged bad at the first measurement. However, there is therein no disclosure with regard to a measurement method that takes into consideration variation in measurement accuracy between a plurality of DUTs.
Accordingly, in consideration of the above-noted drawbacks in the prior art, it is an object of the present invention to provide a semiconductor device inspection apparatus and a method for inspecting a semiconductor device, which, taking into consideration variation in measurement capability and measurement accuracy among individual DUTs provided in a measurement section, while considering a prescribed compensation value in a method for evaluating measurement results, can improve the inspection accuracy with respect to semiconductor elements and devices under test, improve the accuracy classification, and reduce the technical steps.
SUMMARY OF THE INVENTION
In order to achieve the above-noted object, the present invention has the following technical constitution.
Specifically, a first aspect of the present invention is a testing equipment of the semiconductor device which performs simultaneous inspection of plurality of semiconductor devices under test and which performs classification of the semiconductor devices into prescribed categories, responsive to the results of the inspection, with utilizing a semiconductor device handler adapted for that purpose, having a mounting means for mounting sequentially the reference sample having a prescribed characteristic value into a plurality of DUT sections provided in the measurement section, a first storage means for storing the prescribed characteristic value of the reference sample, a second storage means for measuring a prescribed characteristic value of the reference sample in each of the DUT sections and storing the measurement results, a difference value calculating means for calculating the difference values between the measured value of the reference sample in each of the DUT sections as stored in the second storaging means and the prescribed characteristic values of the reference value stored in the first storage means, and determining a compensation value for each of the DUT sections, and an inspection means by using the compensation values established for each DUT section for executing prescribed inspection processing for each one of the semiconductor device units under test in each one of DUT sections simultaneously and judging the prescribed characteristics value for each one of the semiconductor devices, respectively.
A second aspect of the present invention is a method for simultaneously inspecting a plurality of semiconductor devices under test and classifying the semiconductor devices into prescribed categories, responsive to the results of the inspection, with utilizing a semiconductor device handler, whereby in order to compensate an unique characteristic inspection, capacity variations with respect to measured values of a prescribed characteristic value which each one of DUT sections provided in the measurement section inherently has, respectively between each one of DUT sections, reference samples having prescribed characteristic values for each one of the plurality of DUT sections is sequentially caused to be mounted thereon, wherein after performing a prescribed measurement, from a difference value between a prescribed reference value of a prescribed characteristic value of the reference sample and a measured value of the characteristic value a compensation value to the measured value with respect to the prescribed characteristic value for each DUT section is determined.
By employing the above-noted technical constitution, a semiconductor device inspection apparatus and method for inspecting a semiconductor device according to the present invention, used in a semiconductor device inspection apparatus, and particularly in a semiconductor device handler adapted for semiconductor device inspection, pre-stores semiconductor devices having reference data into a handler, and periodically moves reference samples among the DUT sections, performing collection of data and using the reference sample as compensation of the DUTs.
As a result, in the present invention, the compensation values are periodically and automatically measured, at a frequency that is priory input, thereby lightening the burden of the operator. In addition, because the measurement is performed automatically, by adjusting the frequency, it is possible to facilitate the adjustment of the compensation's frequency, and it possible to reduce risks, such as leakage of bad devices and redu
Abraham Esaw
De'cady Albert
Katten Muchin Zavis & Rosenman
NEC Electronics Corporation
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