Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-01-10
2004-04-20
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S151000, C438S758000, C427S074000, C427S249300, C427S590000, C156S345420, C156S922000
Reexamination Certificate
active
06723664
ABSTRACT:
BACK GROUND OF THE INVENTION
Field of the Invention
This invention relates to fabrication of semiconductor devices such as large scale integrated circuits (LSI) and other electronics devices such as liquid crystal displays (LCD). Especially, this invention relates to a thin film deposition process where a thin film is deposited on the surface of an underlayer of dissimilar material utilizing a chemical vapor deposition (CVD) method.
A thin film deposition process is carried out in fabrication of semiconductor devices such as LSI and other electronics devices such as LCD. CVD methods have been widely utilized for this process. In CVD methods, plasma-enhanced CVD (PECVD) which utilizes plasma energy for a gas-phase reaction is major.
FIG. 6
shows a schematic view of a PECVD apparatus as an example of conventional thin film deposition apparatuses.
The apparatus shown in
FIG. 6
is mainly composed by process chamber
1
comprising a pumping system, substrate holder
2
for placing substrate
20
in process chamber
1
, deposition gas introduction system
3
for introducing a deposition gas into process chamber
1
and electric power supplying means
4
to supply energy with the introduced deposition gas to generate a plasma.
Deposition gas introduction system
3
introduces the deposition gas through disc shaped gas introduction head
31
which is provided facing to substrate holder
2
. Gas introduction head
31
is hollow and has many gas effusion holes
32
at its front side. The end of pipe
33
introducing the deposition gas is connected with gas introduction head
31
so that the deposition gas can effuse from gas effusion holes
32
toward substrate
20
.
Electric power supplying means
4
is composed so as to supply a radio frequency (RF) power as plasma generation energy. Gas introduction head
31
is commonly used as an electrode for applying the RF. Specifically, introduction head
31
is made of conductor and is connected with RF source
41
interposing a matching box (not shown).
The apparatus shown in
FIG. 6
is operated as follows. The deposition gas is introduced into process chamber
1
by deposition gas introduction system
3
. Controlling a flow rate of the deposition gas, an RF field is applied by RF source
41
from gas introduction head
31
. This RF field ignites a discharge with the deposition gas, thus transformed into plasma, which is utilized for thin film deposition on the surface of substrate
20
. Taking an example of thin film deposition, silicon nitride film is deposited utilizing decomposition of silane (SiH
4
) in the plasma which is generated by silane and ammonia (NH
3
) gas mixture used as the deposition gas.
In thin film deposition processes as described, materials of thin films are often dissimilar to underlayers. For example, in fabrication of insulated-gate field effect transistors (IGFET), an insulator film is deposited on an underlying semiconductor and a gate is formed on the insulator film. As another example, an insulator film is often deposited on a semiconductor surface for passivation.
It is very critical to reduce interfacial defects in the dissimilar material thin film deposition. For example, if defects are produced on the insulator-semiconductor interface in the IGFET, operation of the transistor may become impossible because of breakdown of the insulator film.
PECVD apparatuses have little problem of interfacial defects caused by heat, because depositions are carried out under temperatures lower than normal thermal CVD apparatuses. However, PECVD apparatuses have a problem that interfacial defects caused by incidence of high-energy charged particles produced in plasma. More specifically, when an insulator film is deposited on a substrate surface which suffered a physical damage such as local deformation caused by high-energy ions impingement onto the substrate surface, or when incidence of high-energy ions onto a deposited insulator film occurs, local deformation defects such as a pin hole are produced in the insulator film, which leads to the defect on product that breakdown may occur with its insulator film. As another possibility, if ions or electrons are incorporated into an insulator film, resistance of the insulator film may decrease causing breakdown voltage fall. Moreover, the incorporation of ions or electrons into an insulator film leads to carrier implantation that causes electron traps, resulting in deterioration of device performance properties.
Though PECVD apparatuses can deposit films at low temperatures compared with thermal CVD apparatuses, there is a limitation in lowering deposition temperature (temperature of a substrate during deposition), because the substrate is exposed to a plasma. Therefore, PECVD apparatuses probably can not satisfy the demand of further lowering of deposition temperature. For example, compound semiconductors of gallium arsenide (GaAs) series have a problem that arsenic atoms dissociate out of the compound at temperatures over 400° C. Prior PECVD apparatuses sometimes have difficulty in operation at temperatures below 400° C.
On the other hand, reducing interfacial energy level density is also a crucial technical matter with respect to state of insulator-semiconductor interface. The interfacial energy levels, which are also called “interface traps” or “interface state”, are inevitably generated on dissimilar materials junction such as semiconductor-insulator junction, namely heterojunction. When the interfacial level density increases, a problem that charging and discharging on the interfacial levels, that is, traps and releases of electrons make a cause of noise and affect operation characteristics becomes serious. In IGFETs using a semiconductor of gallium arsenide series, a surface depletion layer is formed resulting from high-density interfacial levels. The surface depletion layer influences generation of great parasitic resistance on the channel surface. This is a hurdle for higher function of devices.
From a point of view of process, generation of high-density interfacial levels is significantly influenced by state of an underlying semiconductor surface when deposition is carried out. Specifically, if a thin film is deposited on an underlying semiconductor which impurity molecules such as water or oxygen stick on, the high-density interfacial levels are easily generated because the thin film grows under existence of such impurity molecules.
A native oxide layer is often formed on a semiconductor surface. When a insulator film is deposited on this native oxide layer, many levels are generated by this native oxide layer, which leads easily to high-density interfacial levels. To solve this problem, deposition should be carried out after removal of the native oxide layer. Sulfuric acid (H
2
SO
4
) or hydrogen peroxide (H
2
O
2
) is used for the removal of the native oxide layer. However, it is difficult to remove only the native oxide layer completely by this method. Moreover, such a wet process as this brings the problem that the substrate is contaminated.
SUMMARY OF THE INVENTION
The object of the present invention is to solve these problems described above. Specifically, the object of the present invention is to provide a method and apparatus where interfacial level density can be reduced effectively and deposition temperature can be lowered furthermore. Another object of the present invention is to provide a semiconductor device having a semiconductor-insulator junction of low interfacial level density.
To achieve these object, the present invention provides a method and apparatus where a pre-treatment which reduce interfacial level density is carried out before deposition utilizing a catalytic gas phase reaction. And, the present invention provides a semiconductor device having a semiconductor-insulator junction with its interfacial level density is 10
12
eV
−1
cm
−2
or less, which is brought by the pre-treatment in the insulator film deposition process.
REFERENCES:
patent: 3652331 (1972-03-01), Yamazaki
patent: 4237150 (1980-12-01), Wiesmann
patent: 5054
Aoshima Shouichi
Izumi Akira
Masuda Atsushi
Matsumura Hideki
Miyoshi Yosuke
Berry Renee R
Matsumura Hideki
Nelms David
Westerman Hattori Daniels & Adrian LLP
LandOfFree
Method and apparatus for depositing a thin film, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for depositing a thin film, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for depositing a thin film, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3220690