Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-11-25
2004-04-27
Nguyen, Thanh (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S381000, C438S687000
Reexamination Certificate
active
06727138
ABSTRACT:
TECHNICAL FIELD
The invention relates to the field of microelectronics. More specifically, it relates to a process for producing inductive microcomponents on a substrate, which itself can incorporate an integrated circuit.
The components may especially be used in radiofrequency applications, for example in the field of telecommunications.
The subject of the invention is more specifically a process for obtaining circuits having a markedly higher performance than existing components, especially as regards the value of the quality factor. The process forming the subject of the invention also limits the number of steps needed to produce such components and ensures good reproducibility of the characteristics of the components that it allows to be fabricated.
PRIOR ART
In document FR 2 791 470, the applicant has described a fabrication process for producing microinductors or microtransformers on top of a substrate, and especially on top of an integrated circuit. To summarize, this process consists in depositing a layer of material having a low relative permittivity and then etching this material at an aperture made in the hard mask, vertically above a pad for connection with the rest of the integrated circuit, so as to define an interconnection hole, or via.
After having deposited a resist on top of the hard mask, said resist is etched to form the channels defining the geometry of the turns of the inductive component. Thereafter, copper is deposited electrolytically on top of the connection pad and in the channels defined in the top resist.
Such a process has a number of drawbacks, among which may be noted essentially the fact that the electro-deposition step ensures both the formation of the turns of the inductive component and the filling of the via, allowing contact with the metal pad connected to the integrated circuit. Since these regions have different depths, it follows that the electrodeposition is carried out differently at the turns and at the via. Thus, certain irregularities are observed in the formation of the turns, these being prejudicial to good uniformity of the electrical performance of the inductive component.
Furthermore, during the step of etching the top resist, it is necessary to etch longer at the via, compared with the regions in which the channels intended to accommodate the turns are formed. This difference in etch depth causes the release of chemical compounds at the bottom of the via, thereby interfering with the subsequent copper electrodeposition operation.
One of the objectives of the invention is to alleviate these various drawbacks, and especially to make it possible to produce components which have dimensional characteristics that are as precise as possible, so as to give optimum electrical performance.
SUMMARY OF THE INVENTION
The invention therefore relates to a process for fabricating an electronic component. Such a component incorporates an inductive microcomponent, such as an inductor or a transformer, which is placed on top of a substrate and connected to this substrate by at least one metal pad.
In accordance with the invention, this process is one which comprises the following steps:
a) depositing a layer of material having a low relative permittivity on the substrate;
b) depositing a layer forming a hard mask;
c) forming an aperture in the hard mask vertically above the metal pads;
d) etching the layer of material having a low relative permittivity down to the metal pad, in order to form an interconnection hole or via;
e) depositing a layer forming a copper diffusion barrier;
f) depositing a copper primer layer;
g) depositing a protective mask and removing it from the bottom of the via;
h) depositing copper, electrolytically, in the via;
i) removing the rest of the protective mask;
j) depositing a top resist layer with a thickness similar to the thickness of the turns of the inductive microcomponent;
k) etching the top resin layer in order to form channels defining the geometry of the turns of the inductive microcomponent;
l) depositing copper electrolytically in the channels thus etched;
m) removing the rest of the top resist layer;
n) etching the copper primer layer between the copper turns; and
o) etching the copper-diffusion barrier layer between the turns of the inductive microcomponent.
Thus, the process according to the invention links together a number of steps which provide certain improvements over the processes of the prior art. It will be noted in particular that the copper electrodeposition takes place in two separate steps, namely, to begin with, a first step for filling the via, thereby allowing firstly copper to be grown up to level with the lower plane of the inductive microcomponent. In a second step, a copper electro-deposition process is carried out, thereby forming simultaneously the turns of the inductive component and the region of connection between the turns and the via already filled in during the prior deposition step.
Separating these two copper deposition steps in this way ensures homogeneity of this deposition, this being favorable to uniformity of the shape of the turns, and therefore to the quality of the electrical performance and the reproducibility of the process.
It will also be noted that this process can be used on various types of substrate. Thus, in a first family of applications, the process can be used on a semiconductor substrate and especially a substrate that has been functionalized beforehand in order to form an integrated circuit.
In other types of application, it may be a specific substrate, such as an amorphous substrate of the glass or quartz type, or more generally a substrate possessing electrical, optical or magnetic properties suitable for certain applications.
In practice, the material having a low relative permittivity which is deposited on the substrate, may be benzocyclobutene (BCB), or else, a similar material whose relative permittivity is typically less than 3.
In practice, the thickness of this layer of material having a low relative permittivity may be between 10 and 40 microns, preferably being about 20 microns.
The thickness of this layer defines substantially the distance between the inductive component and the substrate. This distance, combined with the relative permittivity of the material of this layer, defines the parasitic capacitance existing between the inductive component and the substrate, and it is highly desirable to minimize this capacitance.
In practice, the material used to form the hard mask on top of the BCB may be chosen from the group comprising: SiC, SiN, Si
3
N
4
, SiON, SiO
2
, SiOC, Y
2
O
3
, Cr, taken individually or in combination.
The properties of these materials include good compatibility with BCB, especially good adhesion as hard mask on the BCB surface. These materials have mechanical properties suitable for them to be used in masking. This avoids the appearance of excessively high stresses at the junction between the hard mask and the subjacent BCB layer. Moreover, by a judicious choice of these materials having the function of a hard mask for the purposes of etching the vias, high selectivity of the BCB etching compared with these materials is acquired, so as to avoid any underetching of the BCB, and thus to obtain the desired profiles without delamination.
This is because the stresses between the BCB and the hard mask could be transferred right to the substrate and cause possible fractures in the latter. Such phenomena owing to excessively high stresses are especially observed in the processes of the prior art, which use thick layers of certain metals to produce the hard mask on top of a BCB layer, with as consequence the risk of poor adhesion.
In practice, and especially when the hard mask is conducting, and typically based on chromium, this hard mask may be removed before the copper-diffusion barrier layer is deposited, so as to remove any inter-turn conducting region.
According to another feature of the invention, a layer forming a copper diffusion barrier is deposited on top of the layer of material having a low relative permittivity, whe
David Jean-Baptiste
Girardie Lionel
Heslin Rothenberg Farley & & Mesiti P.C.
Memscap
Nguyen Thanh
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