Lanthanide doped TiOx dielectric films

Details Lanthanide doped TiOx dielectric films Lanthanide doped TiOx dielectric films

2002-08-15

2004-09-14

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S778000, C438S142000, C438S381000, C438S128000

Reexamination Certificate

active

06790791

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to semiconductor devices and device fabrication. Specifically, the invention relates to gate dielectric layers of transistor devices and their method of fabrication.
BACKGROUND OF THE INVENTION
The semiconductor device industry has a market driven need to improve speed performance, improve its low static (off-state) power requirements, and adapt to a wide range of power supply and output voltage requirements for it silicon based microelectronic products. In particular, in the fabrication of transistors, there is continuous pressure to reduce the size of devices such as transistors. The ultimate goal is to fabricate increasingly smaller and more reliable integrated circuits (ICs) for use in products such as processor chips, mobile telephones, or memory devices such as DRAMs. The smaller devices are frequently powered by batteries, where there is also pressure to reduce the size of the batteries, and to extend the time between battery charges. This forces the industry to not only design smaller transistors, but to design them to operate reliably with lower power supplies.
Currently, the semiconductor industry relies on the ability to reduce or scale the dimensions of its basic devices, primarily, the silicon based metal-oxide-semiconductor field effect transistor (MOSFET). A common configuration of such a transistor is shown in FIG.
1
. While the following discussion uses
FIG. 1
to illustrate a transistor from the prior art, one skilled in the art will recognize that the present invention could be incorporated into the transistor shown in
FIG. 1
to form a novel transistor according to the invention. The transistor
100
is fabricated in a substrate
110
that is typically silicon, but could be fabricated from other semiconductor materials as well. The transistor
100
has a source region
120
and a drain region
130
. A body region
132
is located between source region
120
and drain region
130
, the body region
132
defining a channel of the transistor with a channel length
134
. A gate dielectric, or gate oxide
140
is located on the body region
132
with a gate
150
located over the gate dielectric. Although the gate dielectric can be formed from materials other than oxides, the gate dielectric is typically an oxide, and is commonly referred to as a gate oxide. The gate may be fabricated from polycrystalline silicon (polysilicon) or other conducting materials such as metal may be used.
In fabricating transistors to be smaller in size and reliably operating on lower power supplies, one important design criteria is the gate dielectric
140
. The mainstay for forming the gate dielectric has been silicon dioxide, SiO
2
. Thermally grown amorphous SiO
2
provides an electrically and thermodynamically stable material, where the interface of a SiO
2
layer with an underlying Si provides a high quality interface as well as superior electrical isolation properties. In typical processing, use of SiO
2
on Si has provided defect charge densities on the order of 10
10
/cm
2
, midgap interface state densities of approximately 10
10
/cm
2
eV, and breakdown voltages in the range of 15 MV/cm. With such qualities, there would be no apparent need to use a material other than SiO
2
, but with increased scaling, other requirements for gate dielectrics create the need to find other dielectric materials to be used for a gate dielectric.
What is needed is an alternate dielectric material for forming a gate dielectric that has a high dielectric constant relative to SiO
2
, and is thermodynamically stable with respect to silicon such that forming the dielectric on a silicon layer will not result in SiO
2
formation, or diffusion of material, such as dopants, into the gate dielectric from the underlying silicon layer.
SUMMARY OF THE INVENTION
A solution to the problems as discussed above is addressed in embodiments of the present invention. In accordance with an embodiment of the present invention, a method of forming a dielectric film includes evaporating TiO
2
at a first rate, evaporating a lanthanide at a second rate, and controlling the first rate and the second rate to grow a dielectric film on a substrate, where the dielectric film contains TiO
x
doped with the lanthanide. In one embodiment, the lanthanide includes evaporating a lanthanide selected from a group consisting of Nd, Tb, Dy.
In one embodiment, lanthanide doped TiO
x
layers are formed by electron beam evaporation. In another embodiment, the evaporation of TiO
2
is assisted by ion beam bombardment of a substrate surface during deposition.
A gate dielectric formed as a dielectric film containing lanthanide doped TiO
x
has a larger dielectric constant than silicon dioxide, a relatively small leakage current, and good stability with respect to a silicon based substrate. Embodiments according to the teachings of the present invention include forming transistors, capacitors, memory devices, and electronic systems having dielectric layers containing lanthanide doped TiO
x
. Other embodiments include structures for transistors, capacitors, memory devices, and electronic systems with gate dielectrics containing lanthanide doped TiO
x
. Such gate dielectrics provide a significantly thinner equivalent oxide thickness compared with a silicon oxide gate having the same physical thickness. Alternatively, such gate dielectrics provide a significantly thicker physical thickness than a silicon oxide gate dielectric having the same equivalent oxide thickness.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.


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