Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1999-12-09
2004-04-20
Butler, Dennis M. (Department: 2116)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
Reexamination Certificate
active
06725368
ABSTRACT:
FIELD
The present invention relates generally to power on self testing of computers, and more specifically to methods for performing power on self testing.
BACKGROUND
On startup from a fully shut down state, computers move through a series of startup procedures to check the integrity of certain system components and the system itself. Such tests are initiated from a number of sources. Initial startup testing is performed from instructions stored in a basic input/output system (BIOS). The computer BIOS is built-in software that is run initially on startup of the computer. The BIOS contains all the code required to control the peripheral devices of the computer, such as keyboard, display screen, disk drives, serial communications, and the like.
The BIOS is typically stored on a read only memory (ROM) chip. Since it is stored on a dedicated chip, the BIOS is protected from many disk and memory failures. The BIOS allows the computer to boot itself. On startup, the BIOS is often copied into computer random access memory (RAM) because RAM operates faster than ROM.
The BIOS of a computer runs a certain number of tests on the system before passing control of computer functions to an operating system such as Microsoft Windows or the like. The diagnostic tests are referred to as the power on self test (POST). These tests take a certain amount of time to run, and may delay the startup of the computer system. Once these tests are complete, the BIOS will begin loading the operating system.
In general, the BIOS POST tests include tests and procedures for initializing system hardware, checking memory, initializing power management systems if necessary, enabling the keyboard, testing the serial, parallel, USB, and network ports, initializing floppy drives and hard disk drive controllers, and the like.
In order to allow a user of a computer to be able to get access to the computer quickly, a number of schemes for reducing the number of POST tests run are in use. These POST schemes to speed up boot of the computer eliminate certain POST tests from executing. The various POST tests have varying degrees of pertinence to the operation of a computer. For example, some tests should be performed every single time a computer boots up. Other tests may only need to be run every fifth time. Some components tested in the POST rarely if ever have problems, Such POST tests may only need to be run once a week.
However, all the POST tests should be run at some point. Schemes that skip certain tests because they are statistically low in the probability of failure nevertheless can run afoul of corrupted components, operating systems and the like, especially of the POST test is skipped for many boot cycles.
Some schemes eliminate many POST tests, then if one of the POST tests that does run indicates an error, a full set of POST tests is run at the next boot. This scheme fails to find problems that may be present in the areas the POST test does not examine. It only initiates a full POST test if one of the selected POST tests which is run indicates a problem. In this scheme, when a problem occurs with a component or system which would be detected by a POST test which is bypassed occurs, no full POST testing will occur unless one of the normally run POST tests has an error. While many POST errors for non-essential tests may not be serious, when an error goes undetected and uncorrected for a period of time, it may compound and lead to other errors, all of which would be preventable by simply running all the tests.
Therefore, there is a need in the art for a way to ensure system integrity while still allowing faster boot times for a computer.
SUMMARY
The present invention overcomes the problems of known systems by providing a POST testing process which bypasses non-essential POST tests on initial system startup, but performs the remaining tests after the user has gotten started with use of the computer. The remaining tests are run transparently to the user, in down time, after a period of inactivity, or in the computing background.
In one embodiment, a method for executing a power on self test includes selecting a primary subset of POST tests to execute during initial POST, selecting a secondary subset of POST tests to run after initial POST, executing the primary subset of POST tests during initial POST, and executing the secondary POST tests in a background setting.
In another embodiment, a method for executing a power on self test includes executing a predetermined subset of a full set of POST tests, waiting for a predetermined period of inactivity of the computer, and executing the remaining POST tests after the predetermined period. Any remaining POST test errors are flagged with a persistent flag, added to the predetermined subset of POST tests, and executed as part of the new subset upon a next computer startup.
A computer BIOS is hard coded with instructions for performing the methods in one embodiment.
Other embodiments are described and claimed.
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WebSurfer—“SE440BX Freezes on Boot-up”—Dec. 6, 1998—Newsgroups: intel.motherboards.pentium_II.*
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Butler Dennis M.
Du Thuan
Gateway Inc.
Leonary-Proehl
Proehl Jeffrey A.
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