Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-12-22
2003-02-11
Ton, David (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S764000
Reexamination Certificate
active
06519735
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and apparatus for detecting errors in data output from memory relative to the data input to the memory and a device failure in the memory.
BACKGROUND OF THE INVENTION
Apparatus for detecting errors in data output from memory, relative to the data input to the memory are well known to those of ordinary skill in the art. Such error detecting apparatus, for example, makes use of error correction codes which are designed to detect errors in data output from memory relative to the data input to memory and allow for the correction of certain kinds of errors in the data. These error correction codes operate, for example, by constructing the data to be input to memory according to predefined rules of construction. Thus, departures from this construction in data output from the memory may be automatically detected as an error and the detected error can be corrected.
Some of these error correction codes are designed, for example, to easily detect and allow for the correction of the most likely errors committed by a particular type of memory. For example, it may be known that a particular type of memory may commit frequent one-bit errors indicative of a cell which is not properly set. Thus, for example, it would be desirable to use with this type of memory an error correction code which can easily detect one-bit errors.
Error correction codes are particularly desirable, for example, in workstations and servers where applications are being performed by which a higher reliability is desired. Personal computers, which are not normally used in such applications, do not normally use error correction codes. In workstations and servers, for example, it is not only desirable to detect errors which result from a cell not being properly set, but it is also desirable to detect errors that may result from device failures. It is further desirable, for example, to isolate the failed device so that it can be replaced or repaired, if possible.
Well known error detecting apparatus which use error correction codes suffer from various disadvantages in that they were not intended to both detect errors in the data output from memory, and indicate when an error may have resulted from a device failure in the memory. Further, such error detecting apparatus, when using known error correction codes, do not allow for the isolation of the device which may have failed.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for detecting errors in data output from memory and a device failure in the memory. In the present invention, a check code is generated based on data to be input to the memory. The check code is valid when equal to zero. The check code is inverted and input along with the data as a codeword to the memory in response to a write command. The codeword, including the inverted check code, is output from the memory in response to a read command. The codeword, including the inverted check code, output from the memory can indicate whether a device in the memory has failed. The inverted check code, included in the codeword output from memory, is re-inverted to obtain the check code. Information is generated based on the data and the codeword including the check code. The information indicates whether the data output from memory includes an error.
REFERENCES:
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patent: 4964130 (1990-10-01), Bowden, III et al.
patent: 5502732 (1996-03-01), Arroyo et al.
patent: 5901160 (1999-05-01), Abe et al.
Holman Thomas J.
MacWilliams Peter D.
Antonelli, Terry Stout & Kraus, LLP.
Intel Corporation
Ton David
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