Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-08-28
2003-11-11
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S301000, C438S302000, C438S305000
Reexamination Certificate
active
06645806
ABSTRACT:
TECHNICAL FIELD
The invention pertains to DRAM devices, and to methods of forming DRAM devices. In particular aspects, the invention pertains to methods of forming access transistor constructions for DRAM devices.
BACKGROUND OF THE INVENTION
Dynamic random access memory (DRAM) is commonly utilized for computer memory. DRAM is incorporated into integrated circuit chips. Such chips frequently comprise a memory array of DRAM devices, and further comprise logic devices provided around a periphery of the memory array. The logic devices can be referred to as peripheral devices.
There is a continuing goal to reduce the size of memory devices and peripheral devices to conserve valuable semiconductor substrate real estate. Another continuing goal is to utilize common fabrication steps during formation of peripheral and memory device structures to reduce the processing time utilized in forming a complete integrated circuit construction.
It would be desirable to develop methods for DRAM fabrication which allow utilization of relatively small memory device structures, and it would be further desirable if such methods could utilize fabrication steps in common with the fabrication of peripheral device circuitry.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a method of forming a DRAM device. The device includes an access transistor construction having a pair of source/drain regions. A halo region is associated with one of the source/drain regions of the access transistor construction and no comparable halo region is associated with the other of the source/drain regions of the access transistor construction.
In another aspect, the invention encompasses a method of forming a DRAM device. A substrate is provided, and the substrate has an active area defined therein. A pair of transistor gate structures are formed over the active area of the substrate. The transistor gate structures are spaced from one another by a gap, and the active area comprises a first portion covered by the transistor gate structures and a second portion between the transistor gate structures. The active area further comprises a third portion which is neither between the transistor gate structures or covered by the transistor gates structures. A mask is formed over the third portion of the active area while leaving the second portion uncovered. While the mask is over the third portion of the active area, dopant is implanted into the opening in the mask at an angle to reach through the gap and to the substrate. A pair of capacitor structures and a bitline are formed. The bitline is gatedly connected to one of the capacitor structures through one of the transistor gate structures, and gatedly connected to the other of the capacitor structures through the other of the transistor gate structures.
In another aspect, the invention encompasses DRAM constructions.
REFERENCES:
patent: 5407852 (1995-04-01), Ghio et al.
patent: 5482878 (1996-01-01), Burger et al.
patent: 5661048 (1997-08-01), Davies et al.
patent: 6127231 (2000-10-01), Mori
Micro)n Technology, Inc.
Pham Hoai
Pham Long
Wells St. John P.S.
LandOfFree
Methods of forming DRAMS, methods of forming access... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of forming DRAMS, methods of forming access..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming DRAMS, methods of forming access... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3169198