Digital process monitor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C324S763010, C327S105000

Reexamination Certificate

active

06668346

ABSTRACT:

BACKGROUND
The manufacture of integrated circuits requires rigorous testing procedures to ensure product reliability. Such testing procedures can also be applied to trouble-shooting and maintenance of the same integrated circuits once they are in use in the finished product. One measurement for an application specific integrated circuit (ASIC) is the performance of the circuit over a variance of process, voltage and temperature (PVT) conditions. This measurement can indicate whether or not the circuit is performing within the design tolerances.
Typically, a prior art analog process monitor includes an external pulse generator and an oscilloscope. As shown in the prior art example of
FIG. 1
, the analog process monitor
4
includes a pulse generator
6
and an oscilloscope
8
. In order the measure the performance of the ASIC
2
, a chain of transistor gates within the ASIC
2
are selected and the pulse generator
6
is input into this chain. The oscillator
8
then measures the delay of the output of the chain. This value is then compared to the expected value to determine whether ASIC
2
is performing as designed. As seen in
FIG. 1
, the analog monitor
4
in measurement is entirely external to the ASIC
2
.
SUMMARY OF INVENTION
In some aspects the invention relates to an apparatus for measuring performance of an integrated circuit comprising: a ring oscillator that generates a series of clocking pulses for a prescribed period; and a ripple counter that counts the series of clocking pulses and outputs a ripple count that corresponds to the performance of the integrated circuit.
In an alternative embodiment, the invention relates to an apparatus for measuring performance of an integrated circuit comprising: means for generating an oscillating clock signal for a prescribed period; and means for counting a ripple count based on the oscillating clock signal during the prescribed period, wherein the ripple count is an indication of the performance of the integrated circuit.
In an alternative embodiment, the invention relates to a method for measuring the performance of an integrated circuit comprising: initiating an oscillating clock signal for a prescribed period; and generating a ripple count derived from the oscillating clock signal during the prescribed period, wherein in the ripple count is indicative of the performance of the integrated circuit.
The advantages of the invention include, at least, a digital process monitor that is internal to the system and calculates a value that correlates to the process variations of the integrated circuit.


REFERENCES:
patent: 5438599 (1995-08-01), Lincoln
patent: 5737342 (1998-04-01), Ziperovich
patent: 5867033 (1999-02-01), Sporck et al.
patent: 5966021 (1999-10-01), Eliashberg et al.
patent: 6115443 (2000-09-01), Wu et al.
patent: 6124143 (2000-09-01), Sugasawara
patent: 6378098 (2002-04-01), Yamashita
patent: 6396312 (2002-05-01), Shepston et al.
patent: 6463562 (2002-10-01), Otsuka

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