Dominant error correction circuitry for a Viterbi detector

Details Dominant error correction circuitry for a Viterbi detector Dominant error correction circuitry for a Viterbi detector

2000-03-29

2003-06-17

Ton, David (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C375S262000

Reexamination Certificate

active

06581181

ABSTRACT:

BRIEF DESCRIPTION
The present invention relates generally to data detection in an optical Partial Response Maximum Likelihood (PRML) read channel, and particularly to error correction circuitry for improving data detection by correcting errors due to a dominant error event in an optical PRML read channel.
BACKGROUND
DVD, an acronym for Digital Video Disc or Digital Versatile Disc, is a relatively new type of Compact-Disc Read-Only-Memory (CD-ROM) with a minimum capacity of approximately 4.7 gigabytes.
FIG. 1
illustrates in block diagram form apparatus for recording to and reading data from DVD
22
. Recording Unit
20
takes digital data m
k
and records it on DVD
20
. (The subscript “k” is used throughout to indicate generally a time-variant signal and the subscript “kn” indicates the value of a time-variant signal at a time k+n.) DVD player
24
includes Optical Pick-up Unit (OPU)
26
, and an optical Partial Response Maximum Likelihood (PRML) Read Channel (Read Channel)
30
. OPU
26
converts information read from DVD
22
into an analog RF signal on line
27
. Read Channel
30
takes this RF signal and generates a digital signal q
k
. Read Channel
30
includes Automatic Gain Control (AGC) & Equalization Circuitry
32
, Analog-to-Digital Converter (ADC)
34
and Viterbi Decoder
36
. AGC & Equalization Circuitry
32
filters and limits the voltage magnitude of the RF signal on line
27
, producing the analog signal on line
33
. ADC
34
samples the analog signal on line
33
and produces a multi-bit digital signal, y
k
, on line
35
that represents the magnitude of the analog signal on line
33
. Viterbi Decoder
36
analyzes the y
k
signal over several sample values and determines the most likely value represented by each sample. Viterbi Decoder
36
represents the most likely values via its output signal, q
k
, on line
40
, which is a single bit in a Non-Return to Zero Inverted (NRZI) format. Ideally, q
k
should be identical to m
k
; however, errors prevents this.
Much of the error in q
k
is caused by baseline wandering. As used herein, baseline wandering refers to low frequency disturbances of a radio frequency signal.
FIG. 2A
illustrates an ideal input signal to ADC
34
, which is free from baseline wandering. The signal graphed in
FIG. 2A
remains centered about a baseline, zero volts in this example, throughout the illustrated time period.
FIG. 2B
illustrates a second input signal to ADC
34
, which is subject to baseline wandering. The illustrated input signal has no fixed baseline; i.e., it exhibits a variable DC offset. The variable DC offset of the radio frequency signal produces a time variable error in y
k
, the output of ADC
34
.
FIG. 3A
is a histogram of the y
k
signal given an input signal to ADC
34
that is free from baseline wandering; i.e., given the signal of FIG.
2
A. In the absence of baseline wandering, the histogram of the y
k
signal represents five distinctive sample values, 1, ⅔, 0, −⅔ and −1. Baseline wandering of the signal to be sampled by ADC
34
produces a quite different histogram.
FIG. 3B
is a histogram of the y
k
signal given the input signal of FIG.
2
B.
FIG. 3B
indicates that ADC
34
does not produce distinct sample values in the presence of baseline wandering, producing instead every sample value between approximately −1.25 to 1.25. FIG.
3
C through
FIG. 3G
are individual histograms for each ideal sample value. Thus,
FIG. 3C
is a histogram of sample values corresponding the ideal value of 1;
FIG. 3D
is a histogram of sample values corresponding to the ideal value of ⅔;
FIG. 3E
is a histogram of sample values corresponding to the ideal value of 0;
FIG. 3F
is a histogram of sample values corresponding to the ideal value of −⅔; and
FIG. 3G
is a histogram of sample values corresponding to the ideal value of −1. These histograms reveal that baseline wandering destroys the one to one correspondence between ideal sample values and the values output by ADC
34
. For example,
FIGS. 3C and 3D
indicate that a y
k
value of +¾ may be due to either an ideal sample value of either 1 or ⅔. Thus, a need exists for circuitry to correct data detection errors caused by baseline wandering.
SUMMARY
The apparatus of the present invention corrects a data detection error caused by baseline wandering in an optical PRML read channel. The apparatus includes error detection circuitry and error correction circuitry. The error detection circuitry monitors a serial output signal from the optical PRML read channel and a first set of input signals to the optical PRML read channel to detect an error event associated with baseline wandering. The error detection circuitry deems an error event to have occurred when three conditions are satisfied. First, a bit sequence represented by the serial output signal matches a first bit sequence associated with the error event. Second, a first difference in a first set of consecutive values represented by the first set of input signals is within a first range of values associated with the error event. Third, a second difference in a second set of consecutive values of the first input signal is within a second range of values associated with the error event. The error detection circuitry responds to satisfaction of all three conditions by asserting an error signal. The error correction circuitry responds to assertion of the error signal by modifying a pair of consecutive bits represented by the serial output signal to generate a corrected output signal having a second bit sequence.


REFERENCES:
patent: 5552942 (1996-09-01), Ziperovich et al.
patent: 5781590 (1998-07-01), Shiokawa et al.
patent: 5844741 (1998-12-01), Yamakawa et al.
patent: 5938790 (1999-08-01), Marrow
patent: 6002538 (1999-12-01), Kanegae et al.
patent: 6111835 (2000-08-01), Honma
patent: 6154870 (2000-11-01), Fredrickson et al.
patent: 6345074 (2002-02-01), Turk et al.

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