Voltage-boosting generator for reducing effects due to...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

Reexamination Certificate

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C326S033000, C327S276000

Reexamination Certificate

active

06580287

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90123430, filed Sep. 24, 2001.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a voltage-boosting generator. More particularly, the present invention relates to a voltage-boosting generator for reducing the effects due to operating voltage variation and temperature change.
2. Description of Related Art
Due to rapid progress in semiconductor manufacturing technologies, the number of transistors in each die is forever increasing. Consequently, stability of circuit during operation must be considered. For example, the voltage-boosting generator for providing suitable operating voltage to the circuit must consider factors such variation of operating voltage, temperature effects and so on.
FIG. 1
is a circuit diagram of a conventional voltage boosting circuit. When the voltage-boosting generator
100
is not in an operating mode, the gate terminal of the NMOS transistor
102
receives a ‘H’ (high level) RESET signal. Hence, the NMOS transistor
102
is conductive. Potential at one terminal (Vx) of the boosting capacitor Cx
104
is 0V and the potential at the other terminal (Vo) of the boosting capacitor Cx
104
is at the boosting voltage Vup. When the voltage-boosting generator
100
starts to work, gate terminal of the NMOS transistor
102
receives a ‘L’ (low level) RESET signal. Hence, the NMOS transistor
102
shuts down and the control signals C
0
, C
1
, C
2
all become ‘L’ so that PMOS transistors
106
~
114
all become conductive and charge up the boosting capacitor Cx
104
. As soon as potential Vx at one terminal of the boosting capacitor Cx
104
is charged to VDD, potential Vo at the other terminal of the boosting capacitor Cx
104
is at Vup+VDD×Cx/(Cx+Cy) where Cy
116
is a parasitic capacitance. Potential Vo is the required boosted voltage level.
As shown in
FIG. 1
, all the PMOS transistors
106
~
114
become conductive simultaneously. However, the PMOS transistors
106
~
114
shut at slightly different times.
FIG. 2A
is graph showing the operating curve of a conventional voltage-boosting generator. As shown in
FIG. 2A
, when the PMOS transistors
106
~
114
all conduct at the same time, potential at terminal Vo is charged from a voltage V
1
to a voltage V
2
and a voltage detection circuit (not shown) will detect the voltage V
2
at the terminal Vo. At this moment, the control signal C
0
changes from a ‘L’ to a ‘H’. The PMOS transistors
106
~
108
are shut down and charging current feeding the boosting capacitor Cx
104
is reduced. Hence, charging rate from voltage V
2
onwards is reduced.
As the terminal Vo charges up from the voltage V
2
to a voltage V
3
, a voltage detection circuit (not shown) will detect the voltage V
3
at the terminal Vo. At this moment, the control signal C
1
changes from a ‘L’ to a ‘H’. The PMOS transistors
109
~
111
are shut down and charging current feeding the boosting capacitor Cx
104
is further reduced. Hence, charging rate from voltage V
3
onwards is further reduced.
As the terminal Vo charges up from the voltage V
3
to a voltage V
4
, a voltage detection circuit (not shown) will detect the voltage V
4
at the terminal Vo. At this moment, the control signal C
2
changes from a ‘L’ to a ‘H’. The PMOS transistors
112
~
114
are shut and the charging of the boosting capacitor Cx
104
is stopped. Hence, charging rate from voltage V
4
onwards is zero.
When the voltage detection circuit (not shown) detects terminal Vo reaching the required boosting level, all PMOS transistors
106
~
114
shut down and the boosting capacitor is no longer charged. However, if there is a change in the operating voltage or the temperature of the die, voltage detected by the voltage detecting circuit may also change. Due to changes in the operating voltage or die temperature, the reference value inside the voltage detecting circuit (not shown) for conducting a comparison may change so much that the boosted voltage generated by the voltage-boosting generator no longer is the required value.
In addition, assume the operating voltage of the die is 2.6V~3.7V and the operating temperature of the die is −40° C.~85° C.
FIG. 2B
is a graph showing the operating curves of a conventional voltage-boosting generator working at temperatures −40° C. and 85° C. respectively. When the die is operating at −40° C., the voltage-boosting generator has a higher charging rate. On the other hand, when the die is operating at 85° C., the voltage-boosting generator has a lower charging rate.
FIG. 2C
is a graph showing the operating curves of a conventional voltage-boosting generator working at voltage 2.6V and 3.7V respectively. Similarly, when a die operates at 3.7V, the voltage-boosting generator has a higher charging rate. When the die operates at 2.6V, the voltage-boosting generator has a lower charging rate. A higher charging rate for the voltage-boosting generator implies a higher charging current and a shorter charging time. On the contrary, a smaller charging output from the voltage-boosting generator results in a longer charging period. Hence, if the die is operating at a temperature of 85° C. and an operating voltage of 2.6V, boosting capacity provided by the voltage-boosting generator is the worst (such as small charging current, long charging period and a charging voltage outside the desired range). Therefore, the ultimate difference in voltage shown in
FIGS. 2B and 2C
is due to the voltage detection circuit for the reasons described above.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a voltage-boosting generator capable of reducing operating voltage and temperature effect. As the operating voltage and temperature of a die changes, the voltage-boosting generator has an automatic mechanism for adjusting the charging time and the number of conductive voltage-driving MOS transistors so that the effects produced by the change in operating voltage and temperature are balanced. Ultimately, the voltage-boosting generator is able to provide a voltage level at the desired value. In addition, the voltage-boosting generator can still operate at ideal operating conditions even if the die is working at a low comer operating condition because charging current and charging time of the voltage-boosting generator are adjustable.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a voltage-boosting generator for reducing the operating voltage effect and the temperature effect. The voltage-boosting generator includes a delay line circuit and a voltage boosting circuit. The delay line circuit is used to perform a time delay according to an initial boosting signal and to produce a control signal. The voltage boosting circuit is used to boosted voltage according to the control signal. Hence, when the operating voltage or the temperature of a die changes, the effects due to the changes in operating voltage or the temperature are minimized. In addition, the voltage-boosting generator can still provide ideal operating characteristics even if the die operates at the lower corner condition.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5191232 (1993-03-01), Wang
patent: 5650671 (1997-07-01), Pascucci et al.
patent: 6430067 (2002-08-01), Lee
patent: 63185054 (1988-07-01), None

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