Process for forming high temperature stable self-aligned...

Details Process for forming high temperature stable self-aligned... Process for forming high temperature stable self-aligned...

2000-10-12

2003-12-30

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S649000

Reexamination Certificate

active

06670249

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
This invention relates to a self-aligned silicide process, and more particularly to a process for forming a self-aligned metal silicide layer such that the metal suicide layer is formed smoothly despite the use of a high processing temperature. Also, the profile of the metal silicide layer can be kept in a stable condition even when the silicide layer is subjected to subsequent high temperature processing operations.
2. Description of Related Art
In the design of integrated circuits, as the level of integration for semiconductor components is increased, resistance in the source/drain terminals of a MOS component will correspondingly increase. When the resistance is increased to a level comparable to the resistance of a MOS channel, in order to reduce the sheet resistance in the source/drain terminals as well as to maintain integrity for the shallow junction between the metal layer and the MOS component, a process known as the self-aligned metal silicide process is often applied in the fabrication of very large scale integration (VLSI) circuits for line widths smaller than about 0.5 &mgr;m.
FIGS. 1A through 1D
are cross-sectional views showing the progression of manufacturing steps for a conventional self-aligned silicide process. First, referring to
FIG. 1A
, a silicon substrate
100
with the main parts of an integrated circuit already formed above, for example, a field oxide layer
110
, a gate
120
and source/drain regions
130
, is provided.
Referring next to FIG.
1
B and
FIG. 1C
, in the subsequent steps a titanium (Ti) layer
140
is formed on the field oxide layer
110
, the gate
120
and the source/drain regions
130
. Thereafter, a thermal processing operation, for example, a rapid thermal processing, is performed so that part of the titanium layer
140
reacts with the polysilicon on the upper surface
121
of the gate
120
and the silicon layer on the upper surface
131
of the source/drain terminals
130
to form titanium silicide (TiSi
2
) layers
150
.
Referring next to
FIG. 1D
, a wet etching method is used to remove the reacted or residual titanium layer
140
(the residual titanium layer may not necessarily be in the same original form), and leaving behind a layer of titanium silicide
150
on the gate
120
and source/drain regions
130
.
A self-aligned suicide process not only can establish a low resistance metal silicide layer, for example, a titanium silicide layer, on silicon and polysilicon surfaces, but also can do so without photo lithographic processing operations. Therefore, it is a very attractive contact metallization procedure. However, owing to the high temperature needed in the process, the siliciding steps are hard to control. Although rapid thermal processing is frequently used in such self-aligned silicide processes, process yield is somewhat low due to the restrictions imposed by the level of maturity in technical applications and other unresolved manufacturing problems.
FIG. 2
shows a cross-sectional view of the titanium silicide layer during subsequent high temperature processing operations after its formation by a conventional self-aligned silicide process. Referring to
FIG. 2
, after the formation of a self-aligned silicide layer by a conventional process as shown in
FIG. 1D
, a dielectric layer
260
and a passivation silicon nitride (Si
3
N
4
) layer
270
are sequentially formed on the field oxide layer
110
, the gate
120
and the source/drain regions
130
above the silicon substrate
100
. After that, high temperature processing operations are performed to convert the original titanium silicide layers
150
into titanium suicide layers
250
a,
250
b
and
250
c,
respectively. For example, if the component is a logic device, then high temperature processing operations are necessary for the formation of its peripheral memory components. These subsequent high temperature processing operations damage the good titanium silicide layer
150
and transform it into somewhat irregular forms
250
a,
250
b
and
250
c.
As a result, the production yield is greatly reduced by using the conventional self-aligned silicide process.
In light of the foregoing, there is a need in the art for an improved process.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a process for forming high temperature stable self-aligned metal silicide layer that not only can generate a smooth and uniform metal silicide layer despite the use of high temperature siliciding reaction, but also can withstand other subsequent high temperature processing operations so that a rather stable metal silicide layer profile is still maintained.
To attain the objects and advantages, and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention is a process for forming a high temperature stable self-aligned metal silicide layer comprising the steps of providing a silicon substrate having a gate and source/drain terminals formed thereon; implanting ions into the silicon substrate; sequentially forming a titanium layer and a titanium nitride layer over the silicon substrate; performing a two-stage thermal processing operation to form a titanium silicide layer from portions of the titanium layer on the gate and the source/drain terminals; and removing the titanium nitride layer and remaining portions of the titanium layer.
It is preferred that the thermal processing operation further include rapid thermal processing, and the implanting step may further include a selective implantation using a mask. In a preferred embodiment, the implanting step includes implanting the silicon substrate with arsenic (As) or argon (Ar) or nitrogen (N
+
) ions having an energy level of between 20~80 KeV and a dosage level of between 5E13~5E14.
Preferably, the thermal processing operation includes sub-high temperature thermal processing and high temperature thermal processing. The sub-high temperature thermal processing may include heating to a temperature of between 550~700 C., and more preferably, between 650~850 C. for about 20~60 seconds. It is preferred that the thermal processing operation include heating in an atmosphere of nitrogen.
The removing step preferably includes selective etching of the titanium nitride layer and the remaining portions of the titanium layer, and the selective etching steps may include a wet etching for exposing the titanium nitride layer and the titanium layer to an RCA-1 prescription of H
2
O:H
2
O
2
:NH
4
4
OH.
The wet etching step may also include exposing the titanium nitride layer and the titanium layer to an SO prescription of H
2
O:H
2
O
2
:H
2
SO
4
.
A similar process may be performed on a silicon substrate having an exposed silicon layer and an exposed polysilicon layer on its upper surface to form a high temperature stable self-aligned metal silicide layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


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deLanerolle, et al., “Titanium Silicide Growth by Rapid-Thermal Processing of Ti Films Deposited on Lightly Doped and Heavily Doped Silicon Substrates,” J. Vac. Sci. Technol. B, vol. 5, No. 6, pp. 1689-1695, Nov./Dec. 1987.
Wolf, “for the VLSI Era vol. 2—Process Integration” pp. 132-133 and 164-167.

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