Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reissue Patent
2001-07-13
2003-10-28
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S059000, C257S072000, C345S087000, C345S090000, C345S092000, C349S040000, C349S043000
Reissue Patent
active
RE038292
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a thin film element, an active matrix substrate, a liquid crystal display device and an active matrix substrate, as well as a method for preventing the electrostatic destruction of an active element included in a liquid crystal display device.
2. Description of Related Art
With the liquid crystal display device having an active matrix format, the switching element in each pixel electrode is connected, and each pixel electrode is switched through the switching element. As the switching element, utilization may be made, for example, of a thin film transistor (TFT).
The construction and operation of the thin film transistor is fundamentally the same as the single crystal silicon MOS transistor.
As the structure of the thin film transistor which utilizes amorphous silicon (&agr;-Si) there are a number of well known types of construction. However, bottom gate structure (reverse stagger structure) wherein the gate electrode is at the bottom of the amorphous silicon film is generally used.
In the structure of a thin film transistor, it is important to reduce the number of construction processes and to assure a high yield.
In addition, in the production process of an active matrix substrate, it is important to effectively protect the thin film transistor from the destruction caused by the generated static electricity. The technology for protecting the thin film transistor from electrostatic destruction is disclosed, for example, in Japanese laid open utility model 63-33130 which is recorded on microfilm, or in laid open patent publication 62-187885.
SUMMARY OF THE INVENTION
One of the objects of the present invention is to provide a novel thin film element production process technology which enables the reduction of the number of thin film transistor manufacturing processes, with a high degree of reliability.
In addition, another object of the present invention is to provide an active matrix substrate and a liquid crystal display device in which the production process is formed utilizing production process technology which is not complicated, and which has adequate electrostatic prevention capacity for the protection elements. In addition, another object of the present invention is to provide an electrostatic destruction prevention method which can prevent the electrostatic destruction of the active elements (TFT) included in the TFT substrate.
One of the desirable situations for the production method of thin film elements according to the present invention is that, at the time of producing the thin film elements having a bottom gate construction, it includes a process for forming a protective film which covers the source electrode, the drain electrode, and the gate electrode material layer. Subsequently a process for forming a first aperture component having a part of a built up film comprising a gate electrode layer is selectively etched. A gate insulation film which is present on a gate electrode material layer, and a protective film are also formed so that a portion of the surface of the gate electrode layer and the gate electrode material layer is exposed. At the same time, a second aperture component is formed wherein selected etching of a portion of the source electrode layer and the protective film on the drain electrode layer is accomplished, so as to expose a part of the source electrode layer and the surface of the drain electrode layer; and a process which subsequently connects at least one of the gate electrode layer, the gate electrode material layer, the source electrode layer, or the drain electrode layer with the electrically conductive material layer through the first and second aperture.
According to the described thin film element manufacturing method, selective etching of the insulation film is accomplished all at once. Hence, the formation process of an aperture to connect the external connection terminal to the electrode (pad open process), and the formation process of an aperture for connecting the internal wiring to the electrode (contact hole formation process) can be jointly accomplished, and the number of processes can be reduced.
As the “electrically conductive material layer”, ITO (indium tin oxide) film is desirably utilized. As described above, the first aperture is formed so that it passes through the overlapped films comprising the first insulation film over the gate electrode material layer and the second insulation film over the first insulation film, a deep contact hole is created so as to correspond in depth of the two insulation films.
However, since ITO has a high melting point, ITO has good step coverage in comparison with aluminum, and the like, therefore the connection is not poor even if it is accomplished through a deep contact hole.
In addition to the ITO film, other transparent electrode materials which have a high melting point, such as metallic oxides can also be utilized as the “electrically conductive material layer”. For example, metallic oxides such as SnOx and ZnOx may be utilized. In this case as well, the step coverage is able to withstand actual use.
In addition, with one desirable situation for an active matrix substrate according to the present invention, a protective means used to prevent the electrostatic destruction used with thin film transistors is connected between at least one line between the scanning line and the signal line, or between an electrically equivalent region to said line and a joint electric potential line.
The protective means used to prevent electrostatic destruction is composed to include a diode which is constructed so as to connect the gate electrode layer in the thin film transistor and the drain electrode layer, and by selectively removing the insulation layer from the gate electrode layer to electrically connect the drain electrode and the gate electrode, and by selectively removing the resultant first aperture component and the insulation from the drained electrode layer. The resultant second aperture component is formed by the same manufacturing process; and furthermore, the gate electrode layer and the drain electrode layer are connected by the electrically conducted layer formed from the same material as the pixel electrodes, through the first and second apertures.
Short circuiting the TFT gate and drain, the formed MOS diode (MIS diode) comprises a substantive transistor, in which there is a high capacity for the flow of electric current, and the static electricity can be quickly absorbed, with high static electricity protection capacity. In addition, since it is substantially a transistor, the control of the electric current/voltage characteristic threshold voltage (V
th
) can be easily accomplished. Furthermore, it is possible to reduce the unnecessary leakage of electric current. In addition, the number of manufacturing processes of the thin film element is reduced, and construction is simplified. As the “pixel electrode” and the “electrically conductive layer formed from the same material as the pixel electrode”, desirable utilization is made of ITO (indium tin oxide) film. Other than the ITO film, utilization may also be made of other transparent electrode materials having a high melting point, such as metallic oxides. For example, use may be made of such metallic oxides as SnOx, and ZnOx and the like.
With one desirable situation for the active matrix substrate according to the present invention, the described “line which has at least one of either a scanning line or a signal line, and electrically equivalent regions” comprises an electrode (pad) for connecting an external connection element, and the “joint electric potential line” with a line (LC-COM line) to which is applied a standard electric potential which becomes the standard at the time of the alternating current driving of the liquid crystals, or with the manufacturing stage of the liquid crystal display device, it comprises a line (guard ring) for jointly connecting the electrode (pad) for connecting the external c
Jr. Carl Whitehead
Oliff & Berridg,e PLC
Schillinger Laura
LandOfFree
Method to prevent static destruction of an active element... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method to prevent static destruction of an active element..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method to prevent static destruction of an active element... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3155155