Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-02-05
2003-02-11
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S614000, C438S611000, C438S667000, C438S669000, C216S018000
Reexamination Certificate
active
06518160
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to methods of making microelectronic devices, and to components for use in the fabrication of microelectronic devices and assemblies.
BACKGROUND OF THE INVENTION
Many microelectronic devices incorporate connection components including one or more dielectric layers having holes extending therethrough and conductive elements incorporated in the connection component. The conductive elements may extend on a surface or surfaces of the dielectric layer, line the holes, extend across the holes, or the dielectric layer may incorporate a combination of these conductive elements.
Holes in connection components may be employed to form vias, which include conductive material lining the holes to provide electrical connections from one side of the connection component to another side. Such vias may be formed in a process for making a ball grid array on the connection component. Holes may also be used to form bond windows to provide an electrical connection from one side of the element to the other. For example, in forming this type of connection, a lead on the connection component may extend from across a hole or a bond window in such connection component. If the connection component is juxtaposed with a semiconductor chip or wafer having contacts on a surface thereof, the lead may be bent downwardly toward such contacts to form an electrical interconnection. U.S. Pat. Nos. 5,489,749, 5,491,302, 5,629,239, and 5,518,964, the disclosures of which are hereby incorporated by reference herein, disclose methods for making electrical connections through a hole or bond window.
A common method of forming holes in a layer of a dielectric substrate is plasma etching. In plasma etching, the portions of the dielectric substrate which are to be removed are exposed to an oxidizing plasma. Desired portions of the dielectric substrate are protected from the plasma by a mask. Typically, the dielectric substrate is masked by a layer of conductive, metallic material. The metal mask comprises a patterned metal layer overlying the dielectric substrate and having holes at locations where holes are to be formed in the dielectric substrate.
The metal mask is typically formed using a photographically patterned mask to selectively etch the metal layer. However, there are drawbacks to the photographically patterned masks commonly used. The photographically patterned mask comprises a photosensitive material exposed to light through a mask having a pattern transparent to the light. The light sets portions of the photosensitive material so that portions may be rinsed away to leave a patterned mask on the metal layer. Typically the patterned mask made using a photosensitive material, for example, a photoimagable solder resist, has a poor thermal stability properties. A photoimageable solder resist generally must be removed from the connection component before it is incorporated into a semiconductor chip package because the resist is unable to withstand the temperature cycling that a package is expected to undergo. Photosensitive materials, furthermore are highly sensitive to contaminants. A contaminant on the material will block the light and create a defect in the patterned mask. The fine line capability for forming conductive elements depends at least in part on the lack of gradation between set photosensitive material and unset photosensitive material in the mask and the adhesion between the mask and the assembly. However, gradation and adhesion problems have been experienced in the field.
Other conductive elements in connection components are formed using photographically patterned masks. After etching to form vias, conductive material is added to the vias by forming a layer of metal within the hole and typically extending on a surface or surfaces of the dielectric substrate. The substrate may be further treated to form leads on the surface or surfaces of the dielectric substrate. Leads may be formed which extend across bond windows as discussed above. The techniques typically used to form these conductive elements also include photographically patterned masks.
Improvements addressing the problems with photographically defined masks for forming conductive elements in connection components are desirable.
SUMMARY OF THE INVENTION
The present invention addresses these needs.
A method of making a connection component in accordance with one aspect of the invention comprises providing an assembly comprising a base layer of dielectric material, a metal layer overlying the base layer, and a top coat of a plasma etchable dielectric material overlying the metal layer and using plasma and a plasma-resistant mask to form openings in the top coat to produce a top coat mask for forming conductive elements from the metal layer of the assembly. The openings in the top coat are formed by plasma etching the top coat through the plasma-resistive mask.
The method of this aspect of the invention may also comprise the step of forming first conductive elements from the metal layer by removing metal from regions of the metal layer aligned with the openings in the top coat mask. Thus, the top coat mask may be used in a subtractive process to form a connection component having first conductive elements on a surface thereof.
An alternative method includes forming conductive elements on the metal layer in an additive process by adding metal to regions of the metal layer aligned with the openings in the top coat mask. The top coat mask may then be removed and metal not aligned with the added metal may then be removed to leave the conductive elements on a surface of the connection component. The resulting connection component has a metal layer comprised of a first metal material and added metal comprised of a second metal. The first and second metals may be the same or different. Both the first and second metals may each be comprised of one or more metals. In preferred embodiments, the second metal is comprised of a metal which is more readily bondable than the first metal, is susceptible to different etchants or etching agents than the first metal material, and/or etched at a different rate than the first metal material in the same etchant. The connection components made in the subtractive process, the additive process or a combinations of such processes may be used as circuit boards, connection components for semiconductor chip assemblies, connection components for semiconductor wafer assemblies, components in a multilayer microelectronic structure or other structures including metallic elements.
In another embodiment of the method of the present invention, the first conductive elements may be used as a metal mask. The method of this embodiment may also comprise the step of forming holes in the base layer using the metal mask. For example, after the subtractive process described above, the top coat mask is allowed to remain on the assembly to define conductive elements later in the method. Another mask is applied to the top coat mask, the other mask having openings aligned with the openings in the top coat mask, holes are formed in the base layer, and the other mask is removed. If vias are to be formed, the other mask preferably has openings slightly larger than the openings in the top coat mask and the base layer is plasma etched. When the base layer is etched to form the holes, the top coat mask is also partially etched to expose regions on the first conductive elements. These regions will define a pad surrounding the via on the top surface of the base layer. The top coat mask remains on the assembly to define areas on which the second conductive elements will be formed. The second conductive elements may be formed by adding a layer of a first metal on the regions and, if vias are to be formed, the second conductive elements may be formed so that they extend into the one or more holes to line the holes. If the one or more holes comprise bonding windows, subsequent steps may be performed to form one or more leads extending across the one or more holes.
The method also preferably includes ad
Fjelstad Joseph
Haba Belgacem
Light David
Brophy Jamie L.
Jr. Carl Whitehead
Lerner David Littenberg Krumholz & Mentlik LLP
Tessera Inc.
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