Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-06-14
2003-11-11
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S946000, C430S005000, C430S313000
Reexamination Certificate
active
06645856
ABSTRACT:
CLAIM OF PRIORITY
This application claims priority to Japanese Patent Application No. 2001-247868 filed on Aug. 17, 2001.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technology for manufacturing semiconductor devices and, more particularly, to a technology applicable to exposure methods in the production of semiconductor devices.
2. Description of the Background
Exposure may be used to form a prescribed pattern on a semiconductor device using a phase-shift mask of half-tone type. The phase-shift mask of half-tone type (“half-tone phase-shift mask”) is a mask which has on a transparent mask base a film that is semitransparent to exposure light (this film is referred to as a “half-tone film”. This half-tone film causes exposure light passing through it to undergo phase shifting without affecting exposure light not passing through it. The half-tone film is usually made of an inorganic material and is relatively thick (e.g., 100 nm)
An exemplary description of a phase-shift mask of half-tone type is found in Japanese Patent Laid-open No. 211837/1997. The disclosed phase-shift mask is constructed to prevent an anomalous pattern due to subpeak from occurring in the shaded part.
The conventional phase-shift mask of half-tone type made of an inorganic film has at least the following limitations. A first limitation is a low fabricating precision due to the thickness of the half-tone film. A second limitation is a low dimensional accuracy of patterns transferred onto the wafer resulting from MEF (Mask Error Enhance Factor) involved in pattern miniaturization. A third limitation is a hindrance to the reduction of TAT (Turn Around Time) in the production of semiconductor devices which arises as it is necessary to produce a number of photomasks before acceptable ones are obtained because the phase-shift mask of half-tone type has a poor fabrication precision.
SUMMARY OF THE INVENTION
The present invention provides a technology which improves the dimensional accuracy of patterns transferred onto the wafer and which reduces TAT in the production of semiconductor devices.
Other and further objects, features, and advantages of the invention will be apparent from the following description taken in connection with the accompanying drawings. In summary, the invention disclosed herein is concerned with transferring a pattern onto a resist film on a wafer by reduction projection exposure through a photomask in which is formed a half-tone phase-shift pattern having an attenuating film and an organic film for phase adjustment.
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Hasegawa Norio
Tanaka Toshihiko
Terasawa Tsuneo
Jr. Carl Whitehead
Smoot Stephen W.
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