Method for isolating elements in a semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438299, 438298, 438300, 438450, 438526, H01L 21336

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active

058211454

ABSTRACT:
A method for isolating elements in semiconductor devices is disclosed, which includes the steps of: forming a field oxide layer on the surface of a semiconductor substrate; using a photo resist pattern to define a field region and an active region; carrying out an ion implantation of several MeV with the photo resist pattern remaining on the field region, so as to form a channel stop layer on the field oxide layer region; and forming a soft error-preventing buried layer in the active region. The field insulating layer may be a silicon oxide layer or a silicon nitride layer. Additionally, a selective epitaxial process may be carried out so as to raise the level of the active region to substantially the height of the field isolating region, thereby flattening the surface.

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IEEE Transactions on Electron Devices, vol. ED-33, No. 11, Nov. 1986, pp. 1659-1666, "Scealed CMOS Technology Using SEG Isolation and Buried Well Process," by Endo, et al.

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