Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-01-29
2003-04-01
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S381000, C438S430000, C438S578000
Reexamination Certificate
active
06541340
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and more particularly to the semiconductor device provided with a conductive path having a stacked structure formed on a semiconductor substrate on which predetermined circuit devices are mounted and to its manufacturing method.
2. Description of the Related Art
A conventional MMIC (Monolithic Microwave Integrated Circuit) includes a semiconductor substrate made of, for example, GaAs (Gallium Arsenide), where circuit devices including active elements such as an FET (Field Effect Transistor) or the like or passive elements such as an inductor, capacitor, bonding pad or a like are mounted. A conductive path functioning as a signal line is used to connect the above circuit devices electrically and to transmit a high-frequency signal thereto. The signal line, together with the semiconductor substrate on which the signal line is formed and a dielectric composed of an insulating film between the semiconductor substrate and the signal line, constitutes a microstrip line. As the signal line constituting the microstrip line, a conductive path having a wiring structure, for example, in which there are two layers up and down may be used.
The configurations of a conventional conductive path functioning as the signal line formed on a semiconductor device such as an MMIC will now be described by referring to
FIGS. 4 and 5
.
FIG. 4
is a top view of a conventional microstrip line
400
having a signal line constructed in two layers up and down.
FIG. 5
is a cross-sectional view of the signal line of
FIG. 4
taken along the line B—B.
As shown in
FIG. 5
, on a flat surface of a substrate
402
made of, for example, GaAs is formed a first interlayer dielectric
404
having an approximately uniform thickness and at a predetermined place on the first interlayer dielectric
404
is formed a lower layer wiring
406
, for example, by a deposition method. At exposed portions of the first interlayer dielectric
404
and on the lower layer wiring
406
, a second interlayer dielectric
408
is formed in a manner such that it covers them. In the second interlayer dielectric
408
is formed a contact hole
410
so that the lower layer wiring
406
is partially exposed. At a predetermined place including portions of the contact hole
410
on the second interlayer dielectric
408
is formed an upper layer wiring
412
by a plating method and the upper layer wiring
412
is electrically connected through the contact hole
410
to the lower layer wiring
406
. A passivation film
414
is formed on exposed portions of the second interlayer dielectric
408
and on the upper layer wiring
412
. The upper layer wiring
412
described above is formed by a known lift-off method by using a resist film for forming the upper layer wiring (not shown). That is, the resist film is first formed on the second interlayer dielectric
408
. Then, patterning is performed on the resist film so as to form an aperture trench corresponding to the desired upper layer wiring
412
. The metal for the upper layer wiring is embedded by the plating method and then the resist film together with unwanted metal accumulated on the resist film is removed. Therefore, the thickness of the upper layer wiring is determined by the thickness of the resist film for forming the upper layer wiring described above.
In the conventional conductive path functioning as the signal line, its resistance is made low by constructing the signal line so as to have the wiring structure stacked in two layers up and down, by forming the resist film for forming the upper layer wiring so as to have the large thickness and thus by forming the upper layer wiring having the thickness being as large as possible.
However, the conventional signal line has problems. That is, when the lift-off method described above is employed, since working accuracy is limited by a ratio of a width of the aperture trench to its depth (i.e., aspect ratio), limits are imposed on the thickness of the resist film for forming the upper layer wiring, i.e., on the thickness of the upper layer wiring. By increasing the thickness of the upper layer wiring, an area of cross-section of the conductive path can be made larger, thus allowing a direct current resistance to be made low, for example, in the case of a high-power MMIC. Moreover, by increasing the thickness of the upper layer wiring, a surface area of the conductive path can be made larger, thus allowing a high-frequency resistance caused by a skin effect against the high frequency signal to be lowered. However, as described above, in the conventional wiring structure, since there is the limit in which the thickness of the upper layer wiring is approximately equal to that of the resist film formed by the lift-off method and therefore defining the thickness of the upper layer wiring actually, it is impossible to satisfactorily lower the direct current resistance and high-frequency resistance in the conductive path.
Furthermore, the conventional semiconductor device has another problem in that, since the conductive layer is formed on a flat surface of the semiconductor substrate, the increased thickness of the upper layer wiring causes an increase in an overall height of the semiconductor device.
SUMMARY OF THE INVENTION
In view of the above, it is an object of the present invention to provide a semiconductor device and a method of manufacturing the same which are novel and fully improved and are capable of lowering satisfactorily a high-frequency resistance or direct current resistance in a signal line. It is another object of the present invention to provide a semiconductor device and a method of manufacturing the same which are capable of lowering a resistance in the signal line without causing an increase in an overall height of the semiconductor device. Unlike the conventional semiconductor device in which the conductive path is formed on the flat surface of the semiconductor substrate on which circuit devices are mounted, according to basic configurations of the present invention, the conductive path is formed on a bottom of a concave trench formed in a semiconductor substrate.
According to a first aspect of the present invention, there is provided a semiconductor device comprising:
a semiconductor substrate;
a circuit device mounted on the semiconductor substrate;
an insulating film covering the circuit device;
a conductive path for the circuit devices formed on the insulating film; and
wherein the semiconductor substrate is formed a concave trench, at a bottom of which the conductive path is provided in a manner that it extends along the concave trench, with the insulating film interposed between the conductive path and the semiconductor substrate.
In the foregoing, a preferable mode is one wherein the insulating film is formed along a wall face of the concave trench and has an approximately uniform thickness in its all portions to maintain a concave shape of the concave trench.
Also, a preferable mode is one wherein the conductive path is so constructed to have a stacked structure composed of an upper conductive layer, a lower conductive layer and an interlayer dielectric interposed between the two conductive layers and structured so as to provide electric continuity for the two conductive layers.
Also, a preferable mode is one wherein the conductive path constitutes a part of a microstrip line used suitably for a high-frequency current.
According to a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device having a semiconductor substrate, a circuit device formed on the semiconductor substrate, an insulating film covering the circuit device and a conductive path used for the circuit device formed on the insulating film, comprising steps of:
forming a concave trench on the semiconductor substrate;
forming the insulating film having an approximately uniform thickness in their all portions on the semiconductor substrate to maintain a
Chaudhari Chandra
Oki Electric Industry Co, Ltd.
Rabin & Berdo P.C.
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