Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-02-28
1999-02-23
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438237, H01L 218246
Patent
active
058743391
ABSTRACT:
A method of forming a ROM includes forming a pad oxide layer on a P-type substrate, forming a silicon nitride layer on the pad oxide layer and patterning the silicon nitride layer. An N well is formed in the P-type substrate, wherein some of the silicon nitride layer is over the N well. A field oxide layer is formed over the substrate. The silicon nitride layer is removed. The N well is doped using first P-type ions to form a plurality of essentially parallel P-pole regions. An insulating layer is formed over the field oxide layer. A plurality of contact windows are formed within the insulating layer to expose a portion of the P-pole regions. The N well is doped and annealed, to form a plurality of P-type diffusion regions under the exposed portions of the P-pole regions. The P-pole regions are doped and annealed, to form a plurality of N-type diffusion regions in the exposed portions of the P-pole regions. A metal layer is formed which fills the contact windows. The metal layer is patterned to form a plurality of essentially parallel word lines. A read only memory device is proposed that includes as plurality of essentially parallel P-pole regions are located on a substrate. A plurality of P-type diffusion regions are located under selected portions of respective P-pole regions. A plurality of N-type diffusion regions are located over respective selected portions of the P-pole regions. Each respective N-type diffusion region and associated P-pole region forms a diode.
REFERENCES:
patent: 5616946 (1997-04-01), Hsu et al.
patent: 5631486 (1997-05-01), Hsu
Tsai Jey
United Microelectronics Corp.
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