Semiconductor memory device having a memory cell capacitor and a

Details Semiconductor memory device having a memory cell capacitor and a Semiconductor memory device having a memory cell capacitor and a

1996-07-15

1999-02-23

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, H01L 218242

Patent

active

058743324

ABSTRACT:
A method for fabricating a dynamic random access memory comprises the steps of determining a design rule for word lines and bit lines and further for a pattern that extends from a memory cell array region to a peripheral region across a stepped boundary, determining a step height of the stepped boundary based upon the design rule, determining a capacitance of the memory cell capacitor based upon the step height of the stepped boundary, determining a parasitic capacitance of a bit line such that a ratio of the parasitic capacitance to the capacitance of the memory cell is smaller than a predetermined factor, and determining the number of the memory cells that are connected to one bit line based upon the parasitic capacitance of the bit line.

REFERENCES:
patent: Re32090 (1986-03-01), Jaccodine et al.
patent: 4056811 (1977-11-01), Baker
patent: 4576479 (1986-03-01), Downs
patent: 4631686 (1986-12-01), Ikawa et al.
patent: 4636985 (1987-01-01), Aoki et al.
patent: 4679171 (1987-07-01), Logwood et al.
patent: 4694205 (1987-09-01), Shu et al.
patent: 4732485 (1988-03-01), Morita et al.
patent: 4751557 (1988-06-01), Sunami et al.
patent: 4791616 (1988-12-01), Taguchi et al.
patent: 4799193 (1989-01-01), Horiguchi et al.
patent: 4827449 (1989-05-01), Inoue
patent: 4958318 (1990-09-01), Harari
patent: 5075890 (1991-12-01), Itoh et al.
patent: 5136533 (1992-08-01), Harari
patent: 5155059 (1992-10-01), Hieda
patent: 5166904 (1992-11-01), Hazani
patent: 5208176 (1993-05-01), Ahmad et al.
patent: 5234858 (1993-08-01), Fazan et al.
patent: 5298775 (1994-03-01), Ohya
Masouka, F., "Are You Ready for Next Generation Dynamic RAM Chips?", IEEE Spectrum, vol. 27, No. 11, Nov. 1980, pp. 110-112.
Mano et al., "Submicron VLSI Memory Circuits,", IEEE International Solid State Circuits Conference, Digest of Technical Papers, Feb. 25, 1983, pp. 233-235.
European Search Report, The Hague, Sep. 7, 1993.

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