Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2001-12-31
2003-09-23
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S230020, C365S230030, C365S230060
Reexamination Certificate
active
06625067
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor memory device and, more particularly, to a synchronous semiconductor memory device capable of variably controlling drivability of a memory.
DESCRIPTION OF THE PRIOR ART
Generally, in a module using a plurality of memories, the drivability of a memory is a more important factor than noise such that drivability is desirable. On the other hand, in a single memory, such as a memory for graphics, the noise of the memory is more important than drivability so that low drivability is required in order to reduce the noise. Accordingly, since there are various usages of memory, a memory having various kinds of drivability is desirable. When the memories are applied to various memory devices, the noise and the drivability are the most important factors. Drivability, representing current sourcing ability, of a data output driver depends on the size of the data output driver. As the width of a MOS transistor including the output driver becomes wider, high drivability has been secured.
But, since the drivability of the memory is fixed in a conventional memory fabricating process, there is a problem in that the memory cannot be variously applied. Namely, when a memory is fabricated for graphics, requiring low drivability, the memory cannot be used in a module using many memories. Conversely, when a memory is fabricated for a module using many memories, the high drivability is required so that noise, due to the high drivability, is highly generated. Accordingly, the memory cannot be used for graphics.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a semiconductor memory device capable of variably controlling drivability of a data output driver.
In accordance with an aspect of the present invention, there is provided a semiconductor memory device comprising an N-bit prefetch unit; a plurality of data output drivers to output data from the N-bit prefetch unit; and a control signal generating means for generating a plurality of control signals in response to command signals, wherein the plurality of data output drivers are driven by the control signals.
REFERENCES:
patent: 6351427 (2002-02-01), Brown
patent: 6430092 (2002-08-01), Nanba
patent: 2002/0024882 (2002-02-01), Ikeda
patent: 2002/0071316 (2002-06-01), Manning
patent: 2002/0105836 (2002-08-01), Benedix
Elms Richard
Hynix / Semiconductor Inc.
Jacobson & Holman PLLC
Le Toan
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