Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2001-10-22
2003-07-15
Pert, Evan (Department: 2829)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C324S750010
Reexamination Certificate
active
06593156
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for carrying out a non-destructive inspection on a semiconductor chip in a wafer state, in an installation state, etc. in a production process, and more specifically to a method for detecting or inspecting a portion having a leakage including a short circuit, increasing resistance, or a disconnection.
2. Description of the Prior Art
Conventionally, such a non-destructive inspection technique has been used to detect a defective portion of a p-n junction in a non-destructive manner as part of analysis of failure and defect in a semiconductor chip.
FIG. 15
illustrates the principle of the conventional non-destructive inspection method. When a laser beam
2
is radiated onto a p-n junction
1
, a pair of an electron
3
and a positive hole
4
is generated. Each of them flows in the opposite direction by the electric field of the empty layer of the p-n junction
1
and the electric field by an external power source
5
. Thus, the flowing current is referred to as a current by an OBIC (optical beam inducted current) phenomenon. This OBIC current
6
is detected as a current or a variation of a current by an ammeter
7
connected in series to the p-n junction
1
.
FIG. 16
illustrates an example of the conventional technology of detecting a defect by an OBIC current. It shows a defect
18
promoting the recombination on the p-n junction
1
with the same configuration as in FIG.
15
. When a laser beam is radiated onto a non-defect portion like a laser beam
22
, an OBIC current flows just as in the case shown in FIG.
15
. On the other hand, when a laser beam is radiated onto the defect
18
promoting the recombination like a laser beam
22
, the recombination annihilates a pair of an electron and a positive hole if it is generated, and no OBIC current flows. Thus, the position of the defect promoting the recombination can be specified.
The OBIC phenomenon at the p-n junction is, as disclosed in Japanese Patent Publication No. 10-135413, not only used to detect a defect of the p-n junction, but also used to detect a disconnected wire in the wiring. The method is described below by referring to the side view shown in FIG.
17
and the plan view shown in FIG.
18
. P-n junctions
1001
,
1002
, and
1003
are connected in series. The wiring is formed parallel to each of the p-n junctions. When the wiring is disconnected by a disconnection defect
1028
, an OBIC current different from the currents of the other p-n junctions flows the p-n junction
1002
connected parallel to the disconnected wiring when a laser beam is radiated, thereby successfully specifying the disconnect wiring.
There is another conventional technology. As disclosed by Beyer, J. et al., Applied Physics Letter (Appl. Phys. Lett.) vol. 74, No. 19. pp. 2863-2865 (1999), a semiconductor substrate (hereinafter referred to as a raw wafer) before configuring an element as a semiconductor device is used in carrying out a non-destructive inspection to inspect the non-uniformity of the impurity density of a semiconductor substrate.
FIG. 19
shows a basic configuration. When the laser beam
2
is radiated onto a raw wafer
200
, a pair of the electron
3
and the positive hole
4
occurs. The pair of the electron
3
and the positive hole
4
is immediately recombined and annihilated if the impurity density in the raw wafer
200
is uniform. However, if the impurity density is not uniform, the OBIC current
6
flows. Magnetic flux
11
formed by the current is detected by a superconducting quantum interference device (hereinafter referred to as SQUID) fluxmeter
12
.
There is the following problem with the above mentioned conventional technology.
In the first conventional technology, to first detect a current change, an electrical connection is required between the inspection device and a semiconductor chip, and an inspection can be carried out only after the completion of the preprocess of the production process of a semiconductor to be inspected, and after the completion of a bonding pad.
An inspection can be carried out after a bonding pad is completed, that is, after a postprocess is completed. However, in this case, there are a number of combinations for an electrical connection, and a large number of process steps and a high cost are required in preparation for the connection. The conventional technology is not effective if a currently defective portion is not electrically connected in series with an ammeter. Therefore, to carry out the inspection without fail, it is necessary to electrically connect an ammeter to all bonding pads capable of passing an OBIC current. Normally, the flow of the OBIC current is detected between two terminals as shown in FIG.
16
. However, the number of combinations of two terminals increases substantially in proportion to the square of the number of bonding pads. Therefore, when the number of bonding pads increases, the number of combinations largely increases. To prepare for the connections each time the type of object chips changes, it is necessary to prepare for an exclusive jig and change the connection, thereby requiring a number of process steps and a high cost.
Furthermore, as described above, in addition to the increasing number of combinations of connections, the electrical connections of the terminals to other devices and parts also affect an inspection, thereby causing the problem that the interpretation of an observation result becomes complicated. Furthermore, the possibility that an inspection may deteriorate other devices and parts makes it considerably hard to actually carry out the inspection after the installation is completed.
The problem with the second conventional technology is that it is very hard to apply the technology as is to a semiconductor chip in view of the response speed. In the Applied Physics letter (Appl, Phys. Lett.) by Beyer, J. et al., vol. 74, No. 19, pp. 2863-2865 (1999) which is referred to as the second conventional technology in the Reference
2
, an observation target is the OBIC current for a raw wafer, and the time constant is no more than 50 &mgr;s, which is described as an observation result on page 2865 in line 4.
On the other hand, the attenuation of the OBIC current transitionally generated in a semiconductor chip proceeds exceedingly fast in most cases as compared with 50 &mgr;s unless the current is led outside. The reason why the attenuation of the OBIC current transitionally generated in a semiconductor chip proceeds exceedingly fast in many cases is that the structures of the element in a semiconductor chip and the wiring are designed to be able to be operated at a high speed in many cases. Practically, a CR time constant which depends on the values of a capacitance C and a resistor R is designed to induce the maximum performance of the semiconductor chip in many cases. Therefore, the OBIC current generated in the semiconductor chip is often attenuated with the time constant. When a semiconductor chip operates at, for example, 1 GHz, the time constant has to be higher than 1 ns. To detect an OBIC current attenuating faster than 1 ns, the response frequency of the SQUID fluxmeter has to be higher than 1 GHz. From an economical viewpoint, the currently available SQUID fluxmeter cannot detect the magnetic flux. For example, the response frequency of the currently most practical high-temperature superconducting DC-SQUID fluxmeter is approximately 1 MHz at most.
Described above are the problems with the conventional technology based on which the present invention has been developed. The problems from the viewpoint of needs are described below.
In the flow of producing a semiconductor device in a wafer process and sending it onto the market, a wafer proving test carried out after forming a bonding pad at the final stage of the wafer process is a method of determining whether or not a chip unit is acceptable in the conventional inspection methods. However, it is difficult to make an appropriate development and production plan by obtaining the
NEC Corporation
Pert Evan
Sughrue & Mion, PLLC
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