Integrated semiconductor chip package

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Details

357 72, 357 71, 357 75, H01L 2302, H01L 2312

Patent

active

049965875

ABSTRACT:
A semiconductor package utilizing a carrier with substantially parallel top and bottom surfaces having a recess in the bottom surface and a slot in the top surface communicating with the recess in the bottom surface and provided with electrical conductors on its top surface is provided with an integrated semiconductor chip having a major surface and contact pads on the major surface in the recess of the carrier, with said contact pads positioned in the region of said slot so that the contact pads can be connected by lead wires passing through said slot, to the conductors on the top side of the carrier. The active surface of the chip containing the contact pads is encapsulated but the back surface of the chip and carrier is left exposed to improve the thermal characteristics of the chip while maintaining a low package profile.

REFERENCES:
patent: 3877064 (1975-04-01), Scheingold et al.
patent: 4538210 (1985-08-01), Schaller

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