Semiconductor substrate and production method thereof

Details Semiconductor substrate and production method thereof Semiconductor substrate and production method thereof

1999-07-06

2002-02-26

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S480000

Reexamination Certificate

active

06350703

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of producing a semiconductor substrate having a single crystal semiconductor layer on an insulating layer. More particularly, the invention concerns an SOI substrate produced by a method called SIMOX (Separation by IMplanted OXygen).
2. Related Background Art
Formation of a single crystal Si semiconductor layer on an insulator is commonly known as silicon on insulator (SOI) technology, and many studies about it have been conducted heretofore, because devices made by making use of the SOI technology have various advantages which cannot be achieved by bulk Si substrates for production of ordinary Si integrated circuits. Specifically, use of the SOI technology presents the advantages including the following.
1. It facilitates dielectric isolation and permits high integration.
2. It is superior in radiation resistance.
3. The parasitic capacitance is reduced, so as to permit increase of operation speed.
4. The well forming step can be omitted.
5. The latch up can be prevented.
6. Fully depleted field effect transistors can be produced, based on formation of thin film.
These are discussed in detail, for example, in the following literature. Special Issue: “Single-crystal silicon on non-single-crystal insulators”; edited by G. W. Cullen, Journal of Crystal Growth, volume 63, no. 3, pp. 429-590 (1983).
Further, there are many reports in these several years about use of SOI as a substrate to realize faster operation and lower power consumption of MOSFET (IEEE SOI conference 1994).
With use of the SOI structure in which the SOI layer is present through the insulating layer on the support substrate, because the insulating layer exists at the lower portion of the element, the element separation process can be simplified more than in the case of the elements being formed on a bulk Si wafer; as a result, device process steps are shortened. Namely, in addition to the higher performance, the SOI structure is expected to be lower in the total of wafer cost and process cost than the structure of MOSFET, IC on bulk Si.
Among others, the fully depleted MOSFETs are expected to realize faster operation and lower power consumption based on improvement in driving force. The threshold voltage (Vth) of MOSFET is normally determined by an impurity concentration in the channel part, and in the case of the fully depleted (FD; Fully Depleted) MOSFET using SOI, the thickness of the depletion layer is also affected by the thickness of SOI film. There were, therefore, strong desires for uniformity of the thickness of SOI film in order to produce large-scale integrated circuits at high yields.
The research about the formation of SOI substrate has been becoming active since the 1970s. Considerable research has been pursued on methods of heteroepitaxial growth of single-crystal Si on a sapphire substrate being an insulator (SOS: Silicon on Sapphire), methods of formation of the SOI structure by dielectric isolation based on oxidation of porous Si (FIPOS: Full Isolation by Porous Oxidized Silicon), bonding, and oxygen ion implantation.
This oxygen ion implantation is a method called SIMOX first reported by K. Izumi (K. Izumi, M. Doken, and H. Ariyoshi: Electron. Lett. 14, p. 593 (1978)). An Si wafer
91
, as illustrated in
FIG. 9A
, undergoes implantation of oxygen ions in about 10
17
to 10
18
/cm
2
(FIG.
9
B). After that, it is annealed at the high temperature of about 1320° C. in an argon-oxygen atmosphere to convert an ion-implanted layer
94
to a silicon oxide layer
95
(FIG.
9
C). As a consequence, Si atoms are bonded to oxygen ions thus implanted around the depth corresponding to the projected range (R
p
) of ion implantation to form a silicon oxide layer
95
, thus obtaining the SOI structure (the SOI substrate prepared by the use of SIMOX will be referred to hereinafter as “SIMOX wafer”).
It is common practice to use a CZ wafer as a silicon substrate for production of the SIMOX wafer. The CZ wafer is a single-crystal silicon substrate made by the Czochralski process.
This CZ wafer includes grown-in defects such as COP (Crystal Originated Particles), FPD (Flow Pattern Defect), and so on, which are defects specific to the bulk wafer.
The size of these COP (Hidekazu Yamomoto, “requirements for large-diameter silicon wafers,” the 23th ultraclean technology college, (August 1996)) and FPD (T. Abe, Extended Abst. Electrochem. Soc. Spring Meeting vol. 95-1, pp. 596, (May, 1995)) is approximately 0.1 to 0.2 &mgr;m. In the use of the CZ wafer, there could occur a defect called OSF (oxidation-induced stacking fault).
The details of COP, FPD, and OSF will be discussed hereinafter.
In the production heretofore of very large scale integrated circuits using this CZ wafer, devices were produced with sufficient margins to the size of the aforementioned grown-in defects, so that the COP etc. rarely affected the device characteristics.
However, for example, considering the example of DRAM, the design rules thereof have been changing as 0.5 &mgr;m for 16M-DRAM, 0.35 &mgr;m for 64M-DRAM, . . . , and, therefore, the influence of COP etc. is becoming more and more prominent on the device characteristics and yields.
Particularly, in the case of 1G-DRAM, it is mentioned that the design rules will be 0.1 to 0.15 &mgr;m.
Namely, the production of the SIMOX wafer with the CZ wafer would pose the problem that the aforementioned defects cause decrease of yield in the production of devices. Therefore, there were desires for a method of producing the SIMOX wafer without the defects of COP etc. originating in the CZ bulk wafer or with very fewer defects than the CZ wafer.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method of producing a semiconductor substrate that can be an SIMOX wafer with higher quality than the conventional SIMOX wafers.
A second object of the present invention is to provide a method of producing an SIMOX wafer having an Si active layer with very few defects of COP etc. originating in the CZ bulk wafer. Another object of the invention is to provide an SOI substrate excellent in the quality of a buried oxide layer.
A method of producing a semiconductor substrate according to the present invention comprises:
a step of preparing a single-crystal silicon substrate produced by the FZ process;
a step of implanting ions into the single-crystal silicon substrate to form an ion-implanted layer; and
a step of forming a buried insulating layer inside the single-crystal silicon substrate.
The present invention is characterized, particularly, by forming a protective film on the single-crystal silicon substrate produced by the FZ process and implanting the ions from the protective film side.
Another method of producing a semiconductor substrate according to the present invention comprises:
a step of preparing a single-crystal silicon substrate produced by the FZ process;
a step of implanting ions into the single-crystal silicon substrate to form an ion-implanted layer;
a step of forming a buried insulating layer inside the single-crystal silicon substrate; and
a step of heat treating a surface of the single-crystal silicon substrate under a reducing atmosphere containing at least hydrogen.
Further, the present invention is characterized by cleaning the single-crystal silicon substrate, or the single-crystal silicon substrate having a protective layer, prior to the formation of the ion-implanted layer.
The present invention is also characterized by having a step of performing a heat treatment in an oxidizing atmosphere, after the formation of the buried insulating layer.


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