Method for forming a via and interconnect in dual damascene

Details Method for forming a via and interconnect in dual damascene Method for forming a via and interconnect in dual damascene

2001-04-30

2002-08-27

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S758000

Reexamination Certificate

active

06440847

ABSTRACT:

BACKGROUND OF THE INVENTION
With the continuing shrinkage of integrated circuit (IC) feature sizes, it is becoming more and more difficult to define small via patterns.
U.S. Pat. No. 6,071,812 to Hsu et al. describes a method of fabricating a metal contact in a reduced aspect ratio contact hole. A spacer is formed on the sidewall of a dielectric layer to etch a small trench opening in a dual damascene process.
U.S. Pat. Nos. 6,150,723 to Harper et al., 5,916,823 to Lou et al., 5,686,354 and 5,795,823 both to Avanzino et al., and 5,741,626 to Jain et al. each describe related dual damascene processes.
U.S. Pat. Nos. 5,858,829 to Chen and 5,792,687 to Jeng et al. each describe the use of spacers to form small openings.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method of forming a via and interconnect in a corner rounded dual damascene structure.
Another object of the present invention is to provide a method of forming a via and interconnect in a dual damascene structure that reduces the RC time delay.
A further object of the present invention is to provide a method of forming a via and interconnect in a dual damascene structure that eliminates the metal open issue.
Yet another object of the present invention is to provide a method of forming a via and interconnect in a dual damascene structure that resolves the photo issue for defining small patterns.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a structure having an exposed active device is provided. A first low-k layer is formed over the structure and active device. A patterned first nitride layer is formed having an opening exposing a portion of first low-k layer aligned over at least a portion of the active device. The patterned first nitride layer having exposed side walls within opening. A second nitride layer is formed over the first nitride layer, lining opening. The second nitride layer is removed, leaving nitride spacers over the side walls of patterned first nitride layer. A second low-k layer is formed over the patterned first nitride layer, filling the patterned first nitride layer opening adjacent the nitride spacers. The second low-k layer, and the first low-k layer through the opening reduced by the nitride spacers are patterned to expose a portion of the active device centered under the portion of first low-k layer exposed by the patterned first nitride layer to form a preliminary dual damascene opening having a lower vertical via opening and a preliminary upper horizontal interconnect opening. The nitride spacers and the first nitride layer exposed by the preliminary dual damascene opening are removed to form a final upper horizontal interconnect opening. The dual damascene opening having substantially 90° edges of the first and second low-k layer. The first and second low-k layers are reflowed to round the substantially 90° edges of the first and second low-k layer within the final dual damascene opening.


REFERENCES:
patent: 5686354 (1997-11-01), Avanzino et al.
patent: 5741626 (1998-04-01), Jain et al.
patent: 5792687 (1998-08-01), Jeng et al.
patent: 5795823 (1998-08-01), Avanzino et al.
patent: 5858829 (1999-01-01), Chen
patent: 5916823 (1999-06-01), Lou et al.
patent: 6071812 (2000-06-01), Hsu et al.
patent: 6150723 (2000-11-01), Harper et al.
patent: 6187661 (2001-02-01), Lou
patent: 6211061 (2001-04-01), Chen et al.
patent: 6225204 (2001-05-01), Wu et al.
patent: 6265321 (2001-07-01), Chooi et al.
patent: 6309962 (2001-10-01), Chen et al.

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