Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With heat sink means
Reexamination Certificate
1998-09-16
2002-12-24
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With heat sink means
C257S706000, C257S717000
Reexamination Certificate
active
06498390
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an integrated circuit package.
2. Background Information
Integrated circuits are typically assembled into a package that is mounted to a printed circuit board. There are many types of integrated circuit packages including quad flat pack, pin grid array and plastic ball grid array (PBGA) packages. A PBGA package typically contains an integrated circuit which is mounted to a substrate. A plurality of solder balls are attached to a bottom surface of the substrate and reflowed to mount the package to a printed circuit board. The printed circuit board may be a motherboard of a computer system. The substrate may have routing traces and vias which connect the integrated circuit to the solder balls.
The integrated circuit of a PBGA package is enclosed by a protective plastic material. The outer plastic material is typically formed with an injection mold process. The integrated circuit generates heat which must be removed from the package. It may be desirable to attach a thermal element such as a heat sink to the plastic housing to facilitate the removal of heat generated by the integrated circuit. The thermal element may be bonded to the top surface of the package.
It has been found that the injection mold process may cause the package to warp. The warpage will create a lack of flatness in the top surface of the plastic housing. The lack of flatness may create air voids between the plastic housing and a thermal element that is mounted to the package. Air has a relatively low coefficient of thermal conductivity. Therefore any air voids in the package/thermal element interface will increase the thermal impedance from the integrated circuit to the thermal element. The increase in thermal impedance will raise the junction temperatures of the integrated circuit. It is important to maintain the junction temperatures below a threshold design value. It would be desirable to provide a means for attaching a thermal element to a plastic ball grid array package that can compensate for warpage in the plastic housing of the package.
SUMMARY OF THE INVENTION
One embodiment of the present invention is an integrated circuit package which may have a thermally conductive tape that attaches a thermal element to a package housing. The housing encloses an integrated circuit that is mounted to a substrate.
REFERENCES:
patent: 4876588 (1989-10-01), Miyamoto
patent: 5533256 (1996-07-01), Call et al.
patent: 5641946 (1997-06-01), Shim
patent: 5672548 (1997-09-01), Culnane et al.
patent: 5738936 (1998-04-01), Hanrahan
patent: 5875102 (1999-02-01), Barrow
patent: 5917700 (1999-06-01), Clemens et al.
patent: 07-193162 (1995-07-01), None
patent: 10-135276 (1998-05-01), None
Blakely , Sokoloff, Taylor & Zafman LLP
Cao Phat X.
Intel Corporation
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