Semiconductor device structure including a tantalum...

Details Semiconductor device structure including a tantalum... Semiconductor device structure including a tantalum...

2001-06-11

2002-11-19

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S241000, C438S242000

Reexamination Certificate

active

06482694

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuit devices and methods for fabricating an integrated circuit and, in particular, monolithic capacitors.
DESCRIPTION OF THE RELATED ART
Research has focussed on finding an insulating film having a high dielectric constant suitable for use in capacitor elements, such as capacitor elements of memory cells in dynamic random access memory (DRAM) devices or other memory devices.
Of the insulating films having high dielectric constants, a tantalum pentoxide (Ta
2
O
5
) film formed by chemical vapor deposition (CVD) has been intensely studied. This is because the tantalum pentoxide film has a large dielectric constant ranging from 25 to 30 and has excellent step-coverage characteristics compared to other dielectric materials, and is more easily deposited than other materials having a high dielectric constant.
U.S. Pat. Nos. 5,438,012 and 5,352,623 to Kamiyama (hereinafter, “the '012 patent” and “the '623 patent”) and U.S. Pat. No. 5,696,017 to Ueno (hereinafter, “the '017 patent”) are all incorporated by reference herein in their entireties, for their teachings on methods for forming a capacitor element within an integrated circuit, wherein tantalum pentoxide is used as the dielectric material for the capacitor insulator layer.
In the '012 patent, as shown in
FIG. 4A
a silicon nitride film
24
is formed on a polysilicon electrode
3
by a quick heat treatment using ammonia gas (NH
3
). Then, as shown in
FIG. 4B
, an impurity-doped tantalum pentoxide (Ta
2
O
5
) film
5
is deposited by the CVD process. Subsequently, as shown in
FIG. 4D
, a titanium nitride (TiN) film
6
is formed as an upper electrode
6
.
In the '623 patent, the surface of a polysilicon film
2
is subjected to rapid thermal nitriding (RTN) by lamp-annealing or lamp heating, through which the polysilicon surface is reacted with nitrogen to form a silicon nitride film (SiN
x
). Then, a tantalum pentoxide film
11
is formed on the lower capacitor electrode
2
by plasma enhanced chemical vapor deposition. The tantalum pentoxide film
11
is densified by a thermal treatment in an oxidizing atmosphere using an electric furnace, then nitrided by a plasma treatment with ammonia by use of a plasma-ion generator. Then, a titanium nitride layer is formed as the upper capacitor electrode
3
on the tantalum pentoxide film
11
.
The '017 patent teaches that in a capacitor having a tantalum pentoxide insulating layer, it is also acceptable to use W, Mo, TiW, Pt, WN, MoN, TiWN, WSi, WSiN etc., instead of TiN as the upper electrode metal.
Tantalum pentoxide, as deposited, has excellent dielectric properties. Experience in prior art devices shows that the Tantalum tends to diffuse into the surrounding layers during subsequent heat treatment, tantalum pentoxide tends to diffuse into the upper or lower layers of the device in which they are used. This may have adverse consequences due to the metal contaminants. Improved structures and methods for integrated circuit capacitors is desired.
SUMMARY OF THE INVENTION
The present invention is an insulating structure that includes: a first silicon nitride layer; a second silicon nitride layer separate from the first silicon nitride layer; and a tantalum pentoxide layer formed between the first and second silicon nitride layers. Other aspects of the present invention include semiconductor devices including the insulating structure, and a method of fabricating the insulating structure.


REFERENCES:
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patent: 5619051 (1997-04-01), Endo
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