Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1998-12-21
2002-09-24
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S726000
Reexamination Certificate
active
06457149
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention concerns semiconductor integrated circuits equipped with a function that performs operation testing as well as the operating testing method of semiconductor integrated circuits.
2. Description of Related Art
ICE (In Circuit Emulator) and ONCE (On Chip Emulator) are known as technologies for performing operating tests on MPUs (Micro Processing Unit). However, ICE requires long wiring, so it can not handle the higher speeds of MPUs in recent years. Therefore, ONCE has come into general use in recent years. ONCE is typically used specifically for MPUs with operating frequencies of 50 MHz or greater.
ONCE is a technology with which an MPU with a built in emulation circuit is formed on a semiconductor chip, and hardware operation testing is performed using this emulation circuit.
Conventional built-in type emulation circuits were realized by using registers with a scanning function for all registers in the MPU.
However, when using registers with a scanning function, there is the disadvantage that the MPU circuit scale becomes large. In other words, with registers with a scanning function, a selector must be equipped for each bit, so the circuit scale increases accordingly.
Also, with conventional emulation circuits, scanning is performed with all registers connected serially, so even when writing or reading data for only part of the registers, a scan must be performed for all registers. This brings the disadvantage of the time required for emulation operation being long with conventional emulation circuits. For example, if the total bit count for each register installed in an MPU is 4000 bits, even when a user wants to read only 1 bit of one of the registers, 4000 clock cycles are required.
SUMMARY OF THE INVENTION
The object of this invention is to provide a semiconductor integrated circuit with a small circuit scale and short time needed for emulation operation, and to provide a semiconductor integrated test method which is performed with a small circuit and short time.
(1) The semiconductor integrated circuit of this invention is equipped with a data register with a scanning function for performing output of data input by scanning to an external bus and outputting by scanning data fetched from this external bus during emulation operation, and with a command register with scanning function that inputs by scanning commands for transferring data from the external bus to another register or commands for transferring data from another register to an external bus during emulation operation.
(2) The semiconductor integrated circuit test method of this invention performs operation testing of the semiconductor integrated circuit through general operation and emulation operation, and the emulation operation is composed of a step of outputting data that was input by scanning onto an external bus to the data register with a scanning function and a step of inputting by scanning commands for transferring data from an external bus to another register to a command register with scanning function, and a step of executing the command that the command register with scanning function input by scanning by the inputting step using a latter circuit after decoding using a command decoding circuit.
(3) Another semiconductor integrated circuit test method of this invention performs semiconductor integrated circuit operation testing through general operation and emulation operation, and the emulation operation is composed of a step of scanning by input to the command register with scanning function a command for transferring data from a specified register to an external bus, a step of executing the command which was input by scanning by the command register with scanning function by the scanning step, and a step of fetching the data on the external bus and outputting it by scanning to the data register with scanning function.
REFERENCES:
patent: 4167780 (1979-09-01), Hayashi
patent: 5898701 (1999-04-01), Johnson
Chung Phung M.
Oki Electric Industry Co, Ltd.
Rabin & Berdo P.C.
LandOfFree
Semiconductor integrated circuit and semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit and semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit and semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2909203