Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-11-19
2002-07-23
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S679000, C438S687000
Reexamination Certificate
active
06423636
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and a method for forming a metal layer on a substrate. More particularly, the present invention relates to an apparatus and a method for forming a metal layer on a substrate utilizing a full coverage seed layer and electrochemical deposition.
2. Background of the Related Art
Copper has become a choice metal for filling sub-micron high aspect ratio interconnect features on substrates as circuit densities increase for the next generation of ultra large scale integration (ULSI) because copper and its alloys have lower resistivity than aluminum and significantly higher electromigration resistance as compared to aluminum. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increased device speeds.
Despite the desirability of using copper for semiconductor device fabrication, choices of fabrication methods for depositing copper into very high aspect ratio features are limited because common chemical vapor deposition processes and physical vapor deposition processes have provided unsatisfactory results for commercial production requirements, such as high throughput, low defects, and consistent uniformity. Furthermore, these processes can be costly. As a result, electroplating or electrochemical deposition is becoming an accepted method for copper metallization of interconnect features in semiconductor devices.
Generally, a copper metallization scheme for forming interconnect features on s substrates comprises physical vapor depositing a barrier layer over the feature surfaces, physical vapor depositing a conductive metal seed layer, preferably copper, over the barrier layer, and then electroplating a conductive metal, preferably copper, over the seed layer to fill the interconnect feature. The deposited layers and the dielectric layers are then planarized, such as by chemical mechanical polishing (CMP) or etching, to define a conductive interconnect feature.
Metal electroplating in general is a well known-art and can be achieved by a variety of techniques. Present cell designs for electroplating a metal onto a substrate are generally based on a fountain plater configuration.
FIG. 1
is a cross sectional view of a typical fountain plater
100
. In a fountain plater configuration, the substrate
10
is secured onto a substrate holder
26
positioned above a cylindrical electrolyte container
102
with the plating surface facing an opening of the cylindrical electrolyte container. The electrolyte (i.e., plating solution ) is pumped into the cell through an electrolyte inlet
30
and flows upwardly to contact the substrate plating surface. An electrical power supply
31
is connected to a cathode contact member
22
and an anode
32
of the system. The cathode contact member
22
of the plating system delivers an electrical current (i.e., a forward plating current) through a seed layer formed on the substrate
10
which induces the metal ions in the electrolyte to deposit onto the exposed conductive surface of the substrate. The anode
32
is typically disposed in the electrolyte and is electrically biased to attract the negatively charged counterparts of the metal ions in the electrolyte.
However, a number of obstacles impair commercially acceptable copper metallization of interconnect features on semiconductor devices that satisfies commercial standards such as high throughput and low edge exclusion. One problem encountered by currently practiced copper metallization using electrochemical deposition is that the edge exclusion of the deposition process is much larger than commercially acceptable standards of about 3 mm or less. Typically, the edge exclusion, i.e., the peripheral portion of the substrate that is wasted because of the constraints of the processing system, is greater than about 6 mm, and the number of devices that can be formed on the substrate is decreased because of the large edge exclusion. In currently practiced copper metallization schemes using electrochemical deposition, the seed layer is deposited in a PVD chamber having a shadow or cover ring that shields a peripheral portion of the substrate from deposition because deposition on the edge and backside portions of the substrate may peel or flake off of the substrate and form contaminate particles during subsequent processes, such as a chemical mechanical polishing (CMP) process, potentially causing defect formations in the devices. Because there is no current commercially acceptable method for removing unwanted deposition from the bevel edge and the backside of a substrate, a shadow ring has to be utilized to prevent deposition on the edge and backside surfaces of the substrate.
FIG. 2A
is a cross sectional view of an edge portion of a substrate
10
and a shadow ring
20
disposed above the substrate in a typical PVD system utilized for depositing a seed layer. Typically, the shadow ring
20
prevents deposition onto an annular peripheral portion
12
of the substrate about 3 mm from the edge of the substrate. The shadow ring
20
also prevents unwanted deposition onto the edge
14
and the backside surface
16
of the substrate. As shown in
FIG. 2A
, the peripheral portion indicated by the distance d
1
is blocked by the shadow ring from receiving seed layer deposition. The resulting deposited seed layer
18
has an edge exclusion, as indicated by the distance d
1
, typically about 3 mm from the edge of the substrate.
FIG. 2B
is a cross sectional view of an edge portion of a substrate
10
disposed on a substrate holder
26
and a cathode contact member
22
of an electroplating system. Because the seed layer
18
has an edge exclusion of about 3 mm, the cathode contact member
22
of the electroplating system must be positioned radially inward of the edge of the seed layer to provide good electrical contact thereto. As a result, the cathode contact member
22
typically contacts the substrate between about 3-6 mm from the edge of the substrate, thereby preventing electrochemical deposition of metal layer
24
on the peripheral portion of the substrate between the edge of the substrate and about 6 mm radially inward from the edge of the substrate, as indicated by the distance d
2
. This large edge exclusion significantly decreases the number of devices that may be formed on a substrate, thereby increasing the cost per device formed on the substrate.
Furthermore, the shadow ring complicates the hardware design of the PVD chamber for depositing the seed layer by requiring delivery of the substrate onto the substrate support member in the chamber with high precision of concentricity with respect to the shadow ring. The substrate seed layer must be deposited substantially concentric with the substrate deposition surface to facilitate proper contact between the contact ring of the electroplating system and the seed layer during the electroplating process. The use of a shadow ring also shortens the life of the process kit in the chamber because the shadow ring must be removed when the deposition build-up on the shadow or shadow ring exceed an acceptable limit. Furthermore, build-up of the seed layer material on the shadow ring may flake off and cause contamination and defect formation on the substrate. These problems presented by the shadow ring increase production cost, decrease uptime and decrease productivity.
Therefore, there is a need for an apparatus and a method for electrochemical deposition of a metal layer on a substrate that achieves less than 3 mm edge exclusion. It would be desirable to eliminate the need for a shadow ring for the formation of the seed layer. It would be further desirable to increase productivity and reduce the cost of each device.
SUMMARY OF THE INVENTION
The present invention generally provides an apparatus and a method for electrochemical deposition of a metal layer on a substrate that achieves high throughput and minimal edge exclusion. One aspect of the invention provides a method for forming a metal layer on
Dordi Yezdi
Sugarman Michael
Applied Materials Inc.
Gurley Lynne A.
Moser Patterson & Sheridan LLP
Niebling John F.
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