Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

2000-06-30

2002-04-23

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06376318

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a method of manufacturing a semiconductor device, and more particularly to, a method of manufacturing a semiconductor device capable of improving the short channel effect of the device, by which a selective epitaxial growth film into which boron having an uniform and high concentration is doped is formed under a gate oxide film, when forming an elevated source/drain (ESD) structure using a selective epitaxial growth (called SEG hereinafter) technology.
2. Description of the Prior Art
In a semiconductor device of a buried channel PMOS elevated source/drain structure having a conventional self-aligned epitaxial silicon sliver (called SESS hereinafter), its facets can be prohibited at a maximum and thus the junction depth neighboring to the channel can be easily reduced by employing the threshold voltage Vt control method by means of ion implantation. Thus, it can improve the short channel characteristic of the device.
FIGS. 1A through 1D
are sectional views of devices sequentially showing to illustrate a method of manufacturing a conventional semiconductor device. The case of forming the PMOS will be below explained as an example.
FIG. 1A
shows the state in which a device separation film
12
is formed on a silicon substrate
11
and an N-well region is formed thereon for forming a PMOS.
Referring to
FIG. 1B
, after an ion implantation region for controlling the threshold voltage
13
is formed by means of ion implantation process for controlling the threshold voltage Vt, a gate oxide film
14
is formed. Then, a gate electrode
15
and a mask oxide film
16
are sequentially formed on the entire structure. Thereafter, the mask oxide film
16
, the gate electrode
15
and the gate oxide film
14
are patterned.
Then, as shown in
FIG. 1C
, an oxide film and a nitride film are sequentially formed on the entire structure. Next, a dual spacer structure formed of an oxide film spacer
17
and a nitride film spacer
18
is formed at the sidewalls of the patterned structure by means of blanket etching process. Thereafter, an epitaxial layer
19
is selectively formed on the exposed silicon substrate
11
by chemical vapor deposition. At this time, upon growth of the epitaxial layer
19
, a self-aligned silicon growth is made toward the SESS A.
FIG. 1D
show the state in which ion implantation process and annealing process are performed to activate the dopants and some of the implanted dopants are diffused into the substrate, thus forming an elevated source and drain regions S and D.
In case of forming the buried PMOS elevated source/drain structure in this manner, the depth of the junctions S, D neighboring to the channel can be easily reduced because generation of facets B is prohibited as possible. Accordingly, though it can improve the short channel characteristic of the device can be improved to a certain extent, the profile of the ion implanted threshold voltage is not improved compared to that of the convention device. Thus, it can be seen that the short channel characteristic is improved by the junction engineering, not the channel engineering.
If the integration degree of the device becomes higher, there is a problem that it has a limitation in improving the short channel characteristic only by this junction engineering. Therefore, there is required a method of basically improving the channel characteristic only by the channel engineering.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of manufacturing a semiconductor device capable of improving the channel characteristic of a device, by which a selective epitaxial layer into which boron is doped is in-situ grown to form the counter-doped boron layer of the uniform and still higher concentration than the ion implantation layer for controlling the threshold voltage.
In order to accomplish the above object, the method of manufacturing a semiconductor device according to the present invention is characterized in that it comprises the steps of forming a device separation film on a silicon substrate and then forming a n-well region for forming a PMOS device; forming a selective epitaxial growth film into which boron is doped on said silicon substrate; sequentially forming a gate oxide film, a gate electrode and a mask oxide film on the entire structure and then patterning selected regions of said mask oxide film, said gate electrode and said gate oxide film to obtain a gate region; forming a oxide film and a nitride film on the entire structure and then forming a double spacer made of a oxide film spacer and a nitride film spacer at the sidewalls of the patterned structure by blanket etching process; forming a selective epitaxial growth film on said exposed silicon substrate; and performing ion implantation process for said selective epitaxial growth film and then diffusing dopants into said silicon substrate by annealing process, thus forming an elevated source and drain region.


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