Semiconductor device a burried wiring structure and process...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S637000, C438S652000, C257S774000, C257S758000

Reexamination Certificate

active

06395627

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device. More particularly, the present invention is concerned with a semiconductor device having a buried wiring structure which is improved in electromigration resistance. The present invention is also concerned with a process for fabricating the above-mentioned semiconductor device.
2. Prior Art
In semiconductor devices which have been highly integrated, such as ultra large scale integrated-circuits (ULSI), both of higher-speed signal transmission and higher resistance to serious electromigration problem due to the power consumption have been demanded.
Conventionally, as a material for wiring in LSI, an aluminum alloy (e.g., Al-0.5% Cu, Al-1% Si-0.5% Cu, or the like) has been used. In addition, the use of copper having a resistivity lower than that of the aluminum alloy as a material for wiring is effective for further increasing the speed of devices. Copper has a resistivity as low as about 1.8 &mgr;&OHgr;cm, and is advantageous not only in that it is effective for increasing the speed of the devices, but also in that it has an electromigration resistance higher than that of aluminum by about one figure or more. Therefore, copper is expected as a substitute for the aluminum alloy as a material of wiring.
As a process for fabricating copper wirings, a dual Damascene process has been studied in recent years. This process is one in which a via hole formed in an insulating film and a trench patterned in a wiring form are plugged with copper, and then the excess copper is removed by a chemical mechanical polishing process, thereby fabricating a copper wiring. With respect to the dual Damascene process, various studies have been made on the selection of a material for the insulating film in which a via hole is formed and the selection of a material for the insulating film in which a trench to be plugged with a wiring is formed as well as methods for processing such materials.
On the other hand, from the viewpoint of achieving high reliability of the device, an important task is to obtain a high electromigration resistance, and as mentioned above, it has been reported that copper has an electromigration resistance higher than that of aluminum by about one figure or more.
However, in the electromigration which occurs at a via contact, a change in flow rate of copper atoms occurs in the interface between the copper present on the bottom portion of the via contact and the barrier layer, and in this interface, the barrier layer suppresses the drift of copper, so that copper is not supplied, thus causing a void.
SUMMARY OF THE INVENTION
In this situation, the present inventors have made extensive and intensive studies with a view toward solving the above-mentioned problems accompanying the prior art. As a result, it has unexpectedly been found that a specific semiconductor device is advantageous not only in that is has an improved electromigration resistance, but also in that it has a wiring structure such that the reliability is high and the resistivity is low. Such a specific semiconductor device comprises a substrate; a first metal wiring formed in the substrate, wherein the first metal wiring is comprised of a metal; an insulating film formed on the substrate so as to cover the first metal wiring; a trench formed in the insulating film; a via hole formed in the insulating film so as to reach the first metal wiring from the trench; a metal plug for plugging the via hole, wherein the metal plug is comprised of the same metal as that for the first metal wiring and formed so as to directly connect to the first metal wiring and reach the inside of the trench; and a second metal wiring formed in the trench so as to directly connect to the metal plug, wherein the second metal wiring is comprised of the same metal as that for the metal plug. The present invention is completed, based on the above novel finding.
Accordingly, it is an object of the present invention to provide a semiconductor device which does not suffer the occurrence of voids in the interface between the metal plug and the first metal wiring and the interface between the metal plug and the second metal wiring due to electromigration, and thus has an improved electromigration resistance and a wiring structure such that the reliability is high and the resistivity is low.
It is another object of the present invention to provide an advantageous process for fabricating the above-mentioned excellent semiconductor device.


REFERENCES:
patent: 4920070 (1990-04-01), Mukai

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor device a burried wiring structure and process... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device a burried wiring structure and process..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device a burried wiring structure and process... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2867734

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.