Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-05-04
2002-05-21
Chaudhari, Chandra (Department: 2873)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S307000, C438S549000, C438S923000
Reexamination Certificate
active
06391733
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention generally relates to methods for manufacturing the semiconductor devices and, more particularly, to methods for doping semiconductor materials of such devices.
2. Description of the Related Art
The semiconductor industry is increasingly characterized by a growing trend toward fabricating larger and more complex circuits on a given semiconductor chip. This is being achieved by reducing the size of individual devices within the circuits and spacing the devices closer together. The reduction of the size of individual devices and the closer spacing brings about improved electrical performance.
As active semiconductor layers are made thinner, difficulties arise in doping such active layers, due to the very low energy implants used to dope thin layers, and the difficulty in controlling the implant energy for such implants.
SUMMARY OF THE INVENTION
A method of making a semiconductor device includes performing a doping implant through a layer of dielectric material. The implanting through dielectric material enables use of high-energy implants to form shallow doped regions. Other implanting steps may also be combined with the implanting through the dielectric material.
According to an aspect of the invention, a method of producing a semiconductor device includes the steps of: a) performing a first doping implant in semiconductor material on opposite sides of a gate, thereby forming a source extension and a drain extension in the semiconductor material, wherein the source extension and the drain extension are on respective opposite sides of the gate; b) covering the source extension and the drain extension with a layer of dielectric material, wherein the dielectric material completely covers the source extension and the drain extension, and wherein the layer of dielectric material has an increased thickness close to the gate; and c) performing a second doping implant in the semiconductor material on opposite sides of the gate, the second doping implant being made through the layer of dielectric material which completely covers the source extension and the drain extension.
According to another aspect of the invention, a method of forming source and drain regions in a semiconductor material, includes the steps of: a) performing a first doping implant into uncovered portions of the semiconductor material, the first doping implant creating a first pair of doped semiconductor material regions on opposite respective sides of a gate; b) covering the first doped semiconductor material regions with a dielectric material, wherein the dielectric material has an increased thickness close to the gate; and c) performing a second doping implant through the dielectric material into the semiconductor material, the second doping implant creating a second pair of doped semiconductor material regions on opposite respective sides of the gate, each of the second pair of doped semiconductor material regions overlaps with a respective corresponding of the first pair of doped semiconductor material regions.
According to still another aspect of the invention, a method of forming source and drain regions of a semiconductor material device includes the steps of: a) performing a first doping implant in the semiconductor material, thereby forming first source and drain portions in the semiconductor material; b) forming a dielectric material layer over the semiconductor material; c) performing a second doping implant through the dielectric material layer, thereby forming second source and drain portions in the semiconductor material, wherein the second source portion at least partially overlaps the first source portion, and wherein the second drain portion at least partially overlaps the first drain portion; d) partially removing the dielectric material layer to uncover parts of the first and second source and drain portions; and e) performing a third doping implant through the dielectric material layer, thereby forming third source and drain portions in the semiconductor material, wherein the third source portion at least partially overlaps the first source portion and the second source portion, and wherein the third drain portion at least partially overlaps the first drain portion and the second drain portion; wherein the source region includes the first, second, and third source portions, and the drain region includes the first, second, and third drain portions.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
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Advanced Micro Devices , Inc.
Chaudhari Chandra
Renner , Otto, Boisselle & Sklar, LLP
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