Manufacturing method of semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S241000, C438S682000

Reexamination Certificate

active

06335236

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device and, more specifically, to a manufacturing method of a MOS transistor of semiconductor integrated circuits used in storage devices, information processing apparatuses, etc.
2. Description of Related Art
Conventionally, process techniques exist for formation of respective kinds of semiconductor devices such as semiconductor memories and logic devices. For example, there exists a process technique that is specific to formation of a MOS (metal oxide silicon) transistor.
FIG. 3
is a sectional view showing one step of a conventional manufacturing method of a MOS transistor used in a dynamic random access memory (DRAM) that is an example of semiconductor memories. In
FIG. 3
, reference numeral
1
denotes a silicon substrate;
2
, an isolation region formed in the silicon substrate
1
by using an insulating film;
3
, a reliable thin insulating film;
4
, a conductive film formed on the insulating film
3
;
5
, an insulating film formed on the conductive film
4
;
6
, insulating films (sidewalls) for protecting the conductive film
4
; and
9
, diffusion layers formed by ion implantation. A final MOS transistor is formed by sequentially performing etching etc. after the step of FIG.
3
.
FIG. 4
is a sectional view showing one step of a conventional manufacturing method of a MOS transistor used in logic devices. The parts in
FIG. 4
that are given the same reference numerals as the corresponding parts in
FIG. 3
have the same functions as the latter and hence will not be described. As shown in
FIG. 4
, in the MOS transistor used in logic devices, silicide films
7
are formed on the conductive film
4
and the diffusion layers
9
to reduce the resistivity of the conductive film
4
and the diffusion layers
9
, in other words, to increase the operation speed of the MOS transistor. As described above, the MOS transistor in a DRAM and that in logic devices require processes specific to the respective MOS transistors.
In recent years, with the diversification of the information processing, system LSIs have been developed that are combinations of semiconductor memories and logic devices. For example, a system LSI that is a combination of logic devices and DRAMs as an example of a semiconductor memory is called an embedded-DRAM (hereafter referred to as “eDRAM”). The eDRAM has a feature that it can process a large amount of image data etc. at high speed.
However, as described above, in manufacturing a system LSI such as an eDRAM by combining the DRAMs and the logic devices, formation of MOS transistors in the DRAM and formation of MOS transistors in the logic devices require processes that are specific to the respective kinds of MOS transistors because of differences in their performance. There is a problem that it is difficult to manufacture a system LSI by using processes that are similar to the conventional ones.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problems in the art, and an object of the invention is therefore to provide a semiconductor device manufacturing method which can provide performance that is required for each of a MOS transistor in a semiconductor memory and that in logic devices even in manufacturing a system LSI that is a combination of semiconductor memories and logic devices.
According to a first aspect of the present invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of: forming an isolation region in a semiconductor substrate by using an insulating film, thereby isolating from each other a first region and a second region that is different from the first region; forming a thin insulating film on the first region and the second region; forming a conductive film on the thin insulating film; forming an insulating film on the conductive film; performing working in the first region and the second region; forming diffusion layers on the first region and the second region by implanting impurity ions; and forming silicide films in pre-determined portions on the second region, whereby the first region and the second region are formed on the semiconductor substrate.
The above and other objects, effects, features and advantages of the present invention will become more apparent from the following description of the embodiments thereof taken in conjunction with the accompanying drawings.


REFERENCES:
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patent: 5863820 (1999-01-01), Huang
patent: 5998252 (1999-12-01), Huang et al.
patent: 6004843 (1999-12-01), Huang
patent: 6037625 (2000-03-01), Matasubara et al.
patent: 6069037 (2000-05-01), Liao
patent: 6136677 (2000-10-01), Prein
patent: 6153459 (2000-11-01), Sun
patent: 6156602 (2000-12-01), Shao et al.
patent: 6221767 (2001-04-01), Hsu et al.
patent: 4903403 (2000-10-01), None

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