System-on-chip having adjustable voltage level and method...

Details System-on-chip having adjustable voltage level and method... System-on-chip having adjustable voltage level and method...

2008-05-13

2008-05-13

Le, Don (Department: 2819)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S400000, C326S093000

Reexamination Certificate

active

07373540

ABSTRACT:
A system-on-chip may include a plurality of power domains each of which may have a different operating frequency and include a monitoring unit. A power supply may supply power to each of the power domains. A clock generator may output a reference clock to each of the monitoring units. A controller may set a target operating frequency in response to a target frequency set, control the clock generator to generate a reference clock corresponding to the target operating frequency, and generate a control signal for adjusting voltage levels of the power domains based on operating status information from the monitoring units.

REFERENCES:
patent: 5710910 (1998-01-01), Kehl et al.
patent: 6323714 (2001-11-01), Naffziger et al.
patent: 7142996 (2006-11-01), Patel et al.
patent: 2003/0168915 (2003-09-01), Zhang et al.
patent: 2004/0027160 (2004-02-01), Joshi et al.
patent: 2004/0120087 (2004-06-01), Ishii
Proceedings of the 17thInternational Conference on VLSI Design, 2004, R. Sridhar, “System-on-chip (SoC): clocking and synchronization isues”, pp. 520-527.
Patents Act 1977: Search Report under Section 17.

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