Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-03-04
2008-03-04
Parekh, Nitin (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000, C438S108000, C438S508000
Reexamination Certificate
active
07338891
ABSTRACT:
A semiconductor chip for flip chip bonding, a mounting structure for the semiconductor chip, and methods for forming a semiconductor chip for flip chip bonding and for fabricating a printed circuit board for a mounting structure of a semiconductor chip are provided which may improve connection between a solder bump of the semiconductor chip and a substrate of the printed circuit board without having to use an underfill material. A polymer core of the solder bump may be supported between a 3-dimensional UBM and a 3-dimensional top surface metallurgy, so as to establish connection strength of the solder bump without using underfill material, and to absorb the stresses which may concentrate on the solder bump due to the difference in coefficients of thermal expansion between metals.
REFERENCES:
patent: 5137845 (1992-08-01), Lochon et al.
patent: 5431328 (1995-07-01), Chang et al.
patent: 5631499 (1997-05-01), Hosomi et al.
patent: 5914536 (1999-06-01), Shizuki et al.
patent: 5956605 (1999-09-01), Akram et al.
patent: 6127735 (2000-10-01), Berger et al.
patent: 6297560 (2001-10-01), Capote et al.
patent: 6388322 (2002-05-01), Goossen et al.
patent: 6410415 (2002-06-01), Estes et al.
patent: 6492197 (2002-12-01), Rinne
patent: 6649507 (2003-11-01), Chen et al.
patent: 6661098 (2003-12-01), Magerlein et al.
patent: 2002/0053467 (2002-05-01), Gebauer et al.
patent: 2002/0070463 (2002-06-01), Chang et al.
patent: 2002/0100972 (2002-08-01), Kitajima et al.
patent: 08-213400 (1996-08-01), None
patent: 11-233682 (1999-08-01), None
patent: 2000-228455 (2000-08-01), None
patent: 10-2001-0019775 (2001-03-01), None
patent: 2002-0001421 (2002-01-01), None
patent: 2003-0047514 (2003-06-01), None
Harness & Dickey & Pierce P.L.C.
Parekh Nitin
Samsung Electronics Co,. Ltd.
LandOfFree
Semiconductor chip, mounting structure thereof, and methods... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor chip, mounting structure thereof, and methods..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor chip, mounting structure thereof, and methods... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2796657