Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-05-27
2008-05-27
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S199000, C257SE21661
Reexamination Certificate
active
07378309
ABSTRACT:
A method of fabricating local interconnect on a silicon-germanium 3D CMOS includes fabricating an active silicon CMOS device on a silicon substrate. An insulator layer is deposited on the silicon substrate and a seed window is opened through the insulator layer to the silicon substrate and to a silicon CMOS device gate. A germanium thin film is deposited on the insulator layer and into windows, forming a contact between the germanium thin film and the silicon device. The germanium thin film is encapsulated in a dielectric material. The wafer is heated at a temperature sufficient to flow the germanium, while maintaining the other layers in a solid condition. The wafer is cooled to solidify the germanium as single crystal germanium and as polycrystalline germanium, which provides local interconnects. Germanium CMOS devices may be fabricated on the single crystal germanium thin film.
REFERENCES:
patent: 6777286 (2004-08-01), Clevenger et al.
Liu et al.,High quality single-crystal Germanium on insulator by liquid-phase epitaxy on Silicon substrate, Applied Physics Letters, vol. 84, No. 14, pp. 2563-2565.
Hsu Sheng Teng
Lee Jong-Jan
Maa Jer-shen
Schuele Paul J.
Sharp Laboratories of America Inc.
Tsai H. Jey
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