SONOS memory cells and arrays and method of forming the same

Details SONOS memory cells and arrays and method of forming the same SONOS memory cells and arrays and method of forming the same

2008-01-29

2008-01-29

Purvis, Sue A. (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S268000, C257S330000, C257S329000, C257SE29118

Reexamination Certificate

active

07323388

ABSTRACT:
A trench (2) is fabricated in a silicon body (1). The walls (4) of the trench are provided with a nitrogen implantation (6). An oxide layer between the source/drain regions (5) and a word line applied on the top side grows to a greater thickness than a lower oxide layer of an ONO storage layer fabricated as gate dielectric at the trench wall. Instead of the nitrogen implantation into the trench walls, it is possible to fabricate a metal silicide layer on the top sides of the source/drain regions in order to accelerate the oxide growth there.

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