Method of depositing a silicon dioxide comprising layer in...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S790000, C438S778000, C438S508000, C438S508000

Reexamination Certificate

active

07361614

ABSTRACT:
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing an aluminum containing organic precursor to a chamber containing a semiconductor substrate effective to deposit an aluminum comprising layer over the substrate. An alkoxysilanol is flowed to the substrate comprising the aluminum comprising layer within the chamber effective to deposit a silicon dioxide comprising layer over the substrate. At least one halogen is provided within the chamber during at least one of the aluminum containing organic precursor flowing and the alkoxysilanol flowing under conditions effective to reduce rate of the deposit of the silicon dioxide comprising layer over the substrate than would otherwise occur under identical conditions but for providing the halogen. Other implementations are contemplated.

REFERENCES:
patent: 3809574 (1974-05-01), Duffy et al.
patent: 3990927 (1976-11-01), Montier
patent: 4474975 (1984-10-01), Clemons et al.
patent: 4836885 (1989-06-01), Breiten et al.
patent: 5105253 (1992-04-01), Pollock
patent: 5156881 (1992-10-01), Okano et al.
patent: 5182221 (1993-01-01), Sato
patent: 5387539 (1995-02-01), Yang et al.
patent: 5410176 (1995-04-01), Liou et al.
patent: 5470798 (1995-11-01), Ouellet
patent: 5516721 (1996-05-01), Galli et al.
patent: 5518959 (1996-05-01), Jang et al.
patent: 5565376 (1996-10-01), Lur et al.
patent: 5604149 (1997-02-01), Paoli et al.
patent: 5616513 (1997-04-01), Shepard
patent: 5702977 (1997-12-01), Jang et al.
patent: 5719085 (1998-02-01), Moon et al.
patent: 5741740 (1998-04-01), Jang et al.
patent: 5770469 (1998-06-01), Uram et al.
patent: 5776557 (1998-07-01), Okano et al.
patent: 5786039 (1998-07-01), Brouquet
patent: 5786263 (1998-07-01), Perera
patent: 5801083 (1998-09-01), Yu et al.
patent: 5863827 (1999-01-01), Joyner
patent: 5883006 (1999-03-01), Iba
patent: 5888880 (1999-03-01), Gardner et al.
patent: 5895253 (1999-04-01), Akram
patent: 5895255 (1999-04-01), Tsuchiaki
patent: 5904540 (1999-05-01), Sheng et al.
patent: 5923073 (1999-07-01), Aoki et al.
patent: 5930645 (1999-07-01), Lyons et al.
patent: 5930646 (1999-07-01), Gerung et al.
patent: 5943585 (1999-08-01), May et al.
patent: 5950094 (1999-09-01), Lin et al.
patent: 5960299 (1999-09-01), Yew et al.
patent: 5972773 (1999-10-01), Liu et al.
patent: 5976949 (1999-11-01), Chen
patent: 5981354 (1999-11-01), Spikes et al.
patent: 5989978 (1999-11-01), Peidous
patent: 5998280 (1999-12-01), Bergemont et al.
patent: 6013583 (2000-01-01), Ajmera et al.
patent: 6030881 (2000-02-01), Papasouliotis et al.
patent: 6033961 (2000-03-01), Xu et al.
patent: 6051477 (2000-04-01), Nam
patent: 6069055 (2000-05-01), Ukeda et al.
patent: 6090675 (2000-07-01), Lee et al.
patent: 6127737 (2000-10-01), Kuroi et al.
patent: 6156674 (2000-12-01), Li et al.
patent: 6171962 (2001-01-01), Karlsson et al.
patent: 6187651 (2001-02-01), Oh
patent: 6190979 (2001-02-01), Radens et al.
patent: 6191002 (2001-02-01), Koyanagi
patent: 6245641 (2001-06-01), Shiozawa et al.
patent: 6265282 (2001-07-01), Lane et al.
patent: 6300219 (2001-10-01), Doan et al.
patent: 6326282 (2001-12-01), Park et al.
patent: 6329266 (2001-12-01), Hwang et al.
patent: 6331380 (2001-12-01), Ye et al.
patent: 6355966 (2002-03-01), Trivedi
patent: 6448150 (2002-09-01), Tsai et al.
patent: 6455394 (2002-09-01), Iyer et al.
patent: 6534395 (2003-03-01), Werkhoven et al.
patent: 6583028 (2003-06-01), Doan et al.
patent: 6583060 (2003-06-01), Trivedi
patent: 6607959 (2003-08-01), Lee et al.
patent: 6617251 (2003-09-01), Kamath et al.
patent: 6719012 (2004-04-01), Doan et al.
patent: 6821865 (2004-11-01), Wise et al.
patent: 6930058 (2005-08-01), Hill et al.
patent: 6933225 (2005-08-01), Werkhoven et al.
patent: 7033909 (2006-04-01), Kim et al.
patent: 7053010 (2006-05-01), Li et al.
patent: 2001/0006255 (2001-07-01), Kwon et al.
patent: 2001/0006839 (2001-07-01), Yeo
patent: 2001/0041250 (2001-11-01), Haukka et al.
patent: 2001/0046753 (2001-11-01), Gonzales et al.
patent: 2002/0000195 (2002-01-01), Kao et al.
patent: 2002/0004284 (2002-01-01), Chen
patent: 2002/0018849 (2002-02-01), George et al.
patent: 2003/0032281 (2003-02-01), Werkhoven et al.
patent: 2003/0129826 (2003-07-01), Werkhoven et al.
patent: 2004/0016987 (2004-01-01), Sawada et al.
patent: 2004/0032006 (2004-02-01), Yun et al.
patent: 2004/0082181 (2004-04-01), Doan et al.
patent: 2004/0209484 (2004-10-01), Hill et al.
patent: 2004/0266153 (2004-12-01), Hu
patent: 2005/0009293 (2005-01-01), Kim et al.
patent: 2005/0009368 (2005-01-01), Vaarstra
patent: 2005/0054213 (2005-03-01), Derderian et al.
patent: 2005/0079730 (2005-04-01), Beintner et al.
patent: 2005/0112282 (2005-05-01), Gordon et al.
patent: 2005/0124171 (2005-06-01), Váarstra
patent: 2005/0142799 (2005-06-01), Seo
patent: 0817251 (1998-01-01), None
patent: 959493 (1999-11-01), None
patent: 02277253 (1990-11-01), None
patent: 05-315441 (1993-11-01), None
patent: 06-334031 (1994-12-01), None
patent: 0146224 (1996-01-01), None
patent: 02/27063 (2002-04-01), None
US04/021156, Aug. 2006, Iper.
Beekmann et al.,Sub-micron Gap Fill and In-Situ Planarisation using Flowfill™ Technology, ELECTROTECH , pp. 1-7 ULSI Conference, Portland, OR (Oct. 1995).
Chen et al.,Excimer Laser-Induced Ti Silicidation to Eliminate the Fine-Line Effect for Integrated Circuity Device Fabrication, Journal of Electrochemical Society, vol. 149, No. 11, pp. G609-G612 (2002).
Curtis et al,APCVD TEOS: 03 Advanced Trench Isolation Applications, Semiconductor Fabtech, 9thEd., pp. 241-247 (pre-Jul. 2003).
Disclosed Anonymous 32246,Substrate Contact with Closed Bottom Trenches, Research Disclosure, 1 page (Feb. 1991).
Gasser et al.,Quasi-monolayer deposition of silicon dioxide, Elsevier Science S.A., pp. 213-218 (1994).
George et al.,Atomic layer controlled deposition of SiO2and Al2O3using ABAB . . . binary reactionsequencechemistry, Applied Surface Science, vol. 82/83, pp. 460-467, Elsevier Science B.V., (Jul. 10, 1994).
Hausmann et al.,Catalytic vapor deposition of highly conformal silica nanolaminates, Department of Chemistry and Chemical Biology, Harvard University, pp. 1-13 (May 14, 2002).
Hausmann et al.,Rapid Vapor Deposition of Highly Conformal Silica Nanolaminates, SCIENCE, vol. 298, pp. 402-406 (Oct. 11, 2002).
Horie et al.,Kinetics and Mechanism of the Reactions of O(3P) with SiH4, CH3SiH3, (CH3)2SiH2, and(CH3)3SiHJ. Phys. Chem, vol. 95, pp. 4393-4400 (1991).
US04/021156, Jun. 2004, PCT Search Report.
US04/021156, Jun. 2004, PCT Written Opinion.
Joshi et al.,Plasma Deposited Organosilicon Hydride Network Polymers as Versatile Resists for Entirely Dry Mid-Deep UV Photolithography, SPIE, vol. 1925, pp. 709-720 (Jan. 1993).
Kiermasz et al.,Planarisation for Sub-Micron Devices Utilising a New Chemistry, Electrotech, pp. 1-2, DUMIC Conference, California (Feb. 1995).
Klaus et al.,Atomic Layer Deposition of SiO2Using Catalyzed and Uncatalyzed Self-Limiting Surface Reactions, Surface Review and Letters, vol. 6, Nos. 3 and 4, pp. 435-448 (1999).
Kojima et al.,Planarization Process Using a Multi-Coating of Spin-on-Glass, V-MIC Conference, pp. 390-396 (Jun. 13-14, 1988).
Matsuura et al.,A Highly Reliable Self-planarizing Low-k Intermetal Dielectric for Sub-quarter Micron InterconnectsIEEE, vol. 97, pp. 785-788 (Jul. 1997).
Matsuura et al.,Novel Self-planarizing CVD Oxide for Interlayer Dielectric Applications, IEEE, vol. 94, pp. 117-120 (1994).
McClatchie et al.Low Dielectric Constant Flowfill™ Technology for IMD Applications, 7 pages (pre-Aug.1999).
Miller et al.,Self-limiting chemical vapor deposition of an ultra-thin silicon oxide film using tri-(tert-butoxy)Silanol, Thin Solid Films , vol. 397, pp. 78-82 (2001).
Morishita et al.,Atomic-layer chemical-vapor-depositon of silicon-nitride, Applied Suface Science, vol. 112, pp. 198-204, Elsevier Scien

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of depositing a silicon dioxide comprising layer in... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of depositing a silicon dioxide comprising layer in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of depositing a silicon dioxide comprising layer in... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2768278

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.