Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-01-18
2011-01-18
Richards, N Drew (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S199000, C257S351000, C257S368000, C257S627000, C257S628000
Reexamination Certificate
active
07871876
ABSTRACT:
Embodiments herein present a device, method, etc. for a dual-plane complementary metal oxide semiconductor. The device comprises a fin-type transistor on a bulk silicon substrate. The fin-type transistor comprises outer fin regions and a center semiconductor fin region, wherein the center fin region has a {110} crystalline oriented channel surface. The outer fin regions comprise a strain inducing material that stresses the center semiconductor fin region. The strain inducing material contacts the bulk silicon substrate, wherein the strain inducing material comprises germanium and/or carbon. Further, the fin-type transistor comprises a thick oxide member on a top face thereof. The fin-type transistor also comprises a first transistor on a first crystalline oriented surface, wherein the device further comprises a second transistor on a second crystalline oriented surface that differs from the first crystalline oriented surface.
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Anderson Brent A.
Nowak Edward J.
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
Jung Michael
Kotulak, Esq. Richard M.
Richards N Drew
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