Semiconductor device and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S599000, C257S405000, C257S408000

Reexamination Certificate

active

07968397

ABSTRACT:
A semiconductor device according to the present invention comprises a semiconductor substrate, a gate insulating film which is composed of a material whose main component is a tetravalent metal oxide, a mixture of a tetravalent metal oxide and SiO2, or a mixture of a tetravalent metal oxide and SiON and which containing B when it is in an nMOS structure on the semiconductor substrate or containing at least one of P and As when it is in a pMOS structure on the semiconductor substrate, and a gate electrode made of a metal having a work function of 4 eV to 5.5 eV.

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patent: 6747316 (2004-06-01), Matsuoka et al.
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patent: 2001/0023120 (2001-09-01), Yoshitaka et al.
patent: 2002/0090830 (2002-07-01), Inumiya et al.
patent: 2003/0127640 (2003-07-01), Eguchi et al.
patent: 2004/0142518 (2004-07-01), Yu et al.
patent: 2005/0059198 (2005-03-01), Visokay et al.
patent: 2000-332235 (2000-11-01), None
patent: 2002-280461 (2002-09-01), None
patent: 2005-93815 (2005-04-01), None
Kedzierski, J. et al., “Metal-Gate FinFET and Fully-Depleted SOI Devices Using Total Gate Silicidation,” IEEE, 4 pages, (2002).
Notification of Reasons for Rejection issued by the Japanese Patent Office, mailed Nov. 15, 2005, in Japanese Patent Application No. 2003-335966, and English-language translation thereof.

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