Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-05-06
2000-12-19
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438725, H01L 218242
Patent
active
061626791
ABSTRACT:
A method of forming trench type DRAM capacitor. An insulation layer is formed on a substrate with a trench exposing a conductive region of the substrate. A first conductive layer is formed and conformal to a surface profile of the substrate. A photoresist layer is formed over the first conductive layer to fill the trench. A three-stage of etching process is carried out. A first stage of etching step is carried out to remove a portion of the photoresist layer, thereby exposing the first conductive layer. A second stage step is carried out to remove the first conductive layer by performing an isotropic dry etching step. The first conductive layer is slightly over-etched so that a portion of the first conductive layer inside the trench is also removed. Therefore, the first conductive layer inside the trench will be at a distance lower than a top surface of the insulation layer. A third stage of etching operation is carried out to remove the remaining photoresist layer so that the remaining first conductive layer inside the trench is exposed. A dielectric layer and a second conductive layer are sequentially formed over the first conductive layer.
REFERENCES:
patent: 5966611 (1999-10-01), Jost et al.
Huang Jiawei
Tsai Jey
Worldwide Semiconductor Manufacturing Corp.
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