Method of forming trench transistor with metal spacers

Details Method of forming trench transistor with metal spacers Method of forming trench transistor with metal spacers

1996-10-30

1998-09-01

Dutton, Brian

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438221, 438230, H01L 218238

Patent

active

058010750

ABSTRACT:
An IGFET with a gate electrode and metal spacers in a trench is disclosed. The IGFET includes a trench with opposing sidewalls and a bottom surface in a semiconductor substrate, metal spacers adjacent to the sidewalls and the bottom surface, a gate insulator on the bottom surface between the metal spacers, protective insulators on the metal spacers, a gate electrode on the gate insulator and protective insulators, and a source and drain adjacent to the bottom surface. A method of forming the IGFET includes implanting a doped layer into the substrate, etching completely through the doped layer and partially through the substrate to form the trench and split the doped layer into source and drain regions, applying a high-temperature anneal to diffuse the source and drain regions beneath the bottom surface, depositing a blanket layer of conductive metal over the substrate and applying an anisotropic etch to form the metal spacers, depositing a continuous insulative layer over the substrate to provide the gate insulator and the protective insulators, depositing a blanket layer of gate electrode material over the substrate, and polishing the gate electrode material so that the gate electrode is substantially aligned with a top surface of the substrate. Advantageously, the channel length is significantly smaller than the trench length, and the metal spacers reduce the parasitic resistance of lightly doped source and drain regions.

REFERENCES:
patent: 4713356 (1987-12-01), Hiruta
patent: 4745086 (1988-05-01), Parrillo et al.
patent: 4830975 (1989-05-01), Bovaird et al.
patent: 4962060 (1990-10-01), Sliwa et al.
patent: 4963502 (1990-10-01), Teng et al.
patent: 5094973 (1992-03-01), Pang
patent: 5141891 (1992-08-01), Arima et al.
patent: 5166084 (1992-11-01), Pfiester
patent: 5175118 (1992-12-01), Yoneda
patent: 5182222 (1993-01-01), Malbi et al.
patent: 5217913 (1993-06-01), Watabe et al.
patent: 5231038 (1993-07-01), Yamaguchi et al.
patent: 5331116 (1994-07-01), Haslam et al.
patent: 5362662 (1994-11-01), Ando et al.
patent: 5422289 (1995-06-01), Pierce
patent: 5451804 (1995-09-01), Lur et al.
patent: 5460993 (1995-10-01), Hsu et al.
patent: 5478767 (1995-12-01), Hong
patent: 5504031 (1996-04-01), Hsu et al.
patent: 5512506 (1996-04-01), Chang et al.
patent: 5518944 (1996-05-01), Hiroki et al.
patent: 5538913 (1996-07-01), Hong
patent: 5545579 (1996-08-01), Liang et al.
patent: 5547884 (1996-08-01), Yamaguchi et al.
patent: 5554550 (1996-09-01), Yang
patent: 5567635 (1996-10-01), Acovic et al.
patent: 5571738 (1996-11-01), Krivokapic
patent: 5574302 (1996-11-01), Wen et al.
patent: 5587331 (1996-12-01), Jun
patent: 5599726 (1997-02-01), Pan
patent: 5610091 (1997-03-01), Cho
patent: 5633200 (1997-05-01), Hu
patent: 5640034 (1997-06-01), Malhi
U.S. Application Serial No. 08/703,272, filed Aug. 16, 1996, entitled "Insulated-Gate Field-Effect Transistor With Metal Spacers", by Gardner et al.

Affiliated with

Also associated with

Rating

Method of forming trench transistor with metal spacers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming trench transistor with metal spacers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming trench transistor with metal spacers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-269783