Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-06-28
2011-06-28
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
07968404
ABSTRACT:
A semiconductor device is provided which includes a semiconductor substrate (10), an ONO film (16) provided on the semiconductor substrate (10), and a bit line (14) formed in the semiconductor substrate (10) and connected to a contact (34) provided on the bit line (14), the semiconductor substrate (10) having trench isolation regions (50) provided at both sides of the bit line (14), the contact (34) being interposed between the trench isolation regions (50). Accordingly, even if the bit line (14) and the contact (34) is overlapped in a misaligned manner in a direction vertical to the bit line (14), the leakage current does not flow between the bit line (14) and the semiconductor substrate (10) via the contact (34), because the contact (34) is formed on the trench isolation region (50). This makes it possible to make the overlapping margin of the bit line (14) and the contact (34) large, thereby providing a semiconductor device in which the memory cell can be downsized.
REFERENCES:
patent: 6232181 (2001-05-01), Lee
patent: 6271088 (2001-08-01), Liu et al.
patent: 6828623 (2004-12-01), Guo et al.
patent: 7423312 (2008-09-01), Torii
patent: 2003/0109117 (2003-06-01), Takahashi et al.
patent: 2003/0141532 (2003-07-01), Kato
patent: 2004/0071030 (2004-04-01), Goda et al.
patent: 2004/0079984 (2004-04-01), Kao et al.
patent: 2004/0082198 (2004-04-01), Nakamura et al.
patent: 2004/0110390 (2004-06-01), Takagi et al.
patent: 2004/0252541 (2004-12-01), Yang et al.
patent: 2005/0006694 (2005-01-01), Liu
patent: 2005/0014338 (2005-01-01), Kim et al.
patent: 2006/0131613 (2006-06-01), Kim et al.
patent: 10246343 (2004-04-01), None
patent: 11-186528 (1999-07-01), None
patent: 2003-224213 (2003-08-01), None
patent: 2004-039866 (2004-02-01), None
patent: 2004-111737 (2004-04-01), None
patent: 2004-193178 (2004-07-01), None
patent: 2004-349312 (2004-12-01), None
Eitan et al.; “NRON: A Novel Localized Trapping, w-0Bit Nonvolatile Mrmory Cell”; IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000.
Fox Brandon
Spansion LLC
Vu David
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