Reduced complexity array line drivers for 3D matrix arrays

Details Reduced complexity array line drivers for 3D matrix arrays Reduced complexity array line drivers for 3D matrix arrays

2011-05-10

2011-05-10

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S189090, C365S230060

Reexamination Certificate

active

07940554

ABSTRACT:
A method of biasing a nonvolatile memory array. The nonvolatile memory array includes a first and second plurality of Y lines, a plurality of X lines, a first and second plurality of two terminal memory cells. Each first and second memory cell is coupled to one of the first or second plurality of Y lines and one of the plurality of X lines, respectively. Substantially all of the first plurality and second plurality of Y lines are driven to a Y line unselect voltage. At least one selected Y line of the first plurality of Y lines is driven to a Y line select voltage while floating remaining Y lines of the first plurality of Y lines and while driving substantially all of the second plurality of Y lines to the Y line unselect voltage.

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